Philips BJ3.0E, Руководство по обслуживанию

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Circuit Descriptions, Abbreviation List, and IC Data Sheets EN 141 BJ3.0E PA 9.
9. Circuit Descriptions, Abbreviation List, and IC Data Sheets
Index of this chapter:
9.1 Introduction
9.2 Power Supply
9.3 Front-End
9.4 Common Interface (CI)
9.5 MPIF (PNX 3000)
9.6 PNX2015
9.7 VIPER 2 (PNX 8550)
9.8 PACIFIC 3
9.9 Ambient Light
9.10 Abbreviation List
9.11 IC Data Sheets
Notes:
• Only new circuits (circuits that are not published recently)
are described.
• Figures can deviate slightly from the actual situation, due
to different set executions.
• For a good understanding of the following circuit
descriptions, please use the wiring, block (chapter 6) and
circuit diagrams (chapter 7). Where necessary, you will find
a separate drawing for clarification.
9.1 Introduction
The BJ3.0E is a new TV chassis, specifically developed for
DVB-T reception. The key components are:
•
Common Interface (CI) circuitry.
• MPIF (PNX3000).
• AVIP/COLUMBUS (PNX2015).
• VIPER 2 (PNX8550).
9.1.1 Features
The main features for this chassis are:
•
The move from the analog world to the digital world. W.o.w.
from signal processing via "hardware circuits" to signal
processing via "software algorithms". This means: no
software = no picture and sound!
• Fit for both analog and digital signal processing, this by
converting analog signals into digital transport streams and
allowing seamless zapping between all possible signal
sources. This makes the chassis applicable for e.g.
receiving DVB-T signals in an integrated product form.
• AmbiLight: To be able to control lamps at the rear of the TV
with respect to the measured ambient light level from the
light sensor or the picture content, a control output from
AutoTV has been foreseen.
• The internal digital processing allows new "Multi-Media"
applications such as Content Browser, Memory Card Slot,
Local Area Network support (future) and all kinds of
streaming applications (future).
• The chassis can be upgraded in the future with internal
functionality such as Personal Video Recording, DVD/RW.
A new IC, called Pacific 3, provides Pixel Plus in all models.
This ensures additional sharpening, and contrast and colour
enhancements to the picture.
9.1.2 Chassis Block Diagram
Description below refers to the block diagrams in chapter 6
“Block Diagrams, Test Point Overview, and Waveforms”.
Analog Reception
The TV receives multimedia information by tuning to one of
many 6 MHz input channels available via a cable connection.
When the input channel is an analog channel, the signal is
processed via the PAL/SECAM decoder and the VBI data
decoder.
Digital Reception
The CI module consists of the following functional blocks:
Conditional Access (Module (CAM), Out of Band part, and
buffering. These blocks are interfacing with the DVB-T In Band
(IB) channel decoder and Out of Band (OOB) channel decoder.
The interface is connected to the VIPER. Also the Common
Interface outgoing Transport Stream (TS) is routed to the
VIPER.
The TV receives multimedia information by tuning to one of
many 6 MHz input channels available via a cable connection.
When the input channel is a digital channel, it is processed via
the QAM demodulator and then passed to the Common
Interface device (CI) where secure and scrambled information
is processed. Non-scrambled information is passed through
the CAM to the MPEG-2 Transport Demultiplexer. When the
CAM is not inserted, the output of the QAM demodulator is
routed directly to the MPEG-2 Transport Demultiplexer. The
multi-media processor (VIPER) handles the synchronization
and display of audio-visual material.
The OpenCable Host Device also receives control information
and other data by tuning to an Out-Of-Band (OOB) Forward
Data Channel (FDC) channel. The terminal will remain tuned to
the OOB Forward Data Channel (own tuner) to continuously
receive information. This information is passed to the CAM for
processing, and relevant information is passed back to the TV.
Signal Processing
The AVIP together with the MPIF device is used to perform the
input decoding of a single stream of analog audio and video
broadcast signals. In addition, the AVIP is used for decoding
and presentation of audio output streams. The main data
connection between MPIF and AVIP is done via an I
2
D bus.
The AVIP converts the incoming video data to ITU-656 format
for communication to the VIPER IC.
The audio data is transferred between the AVIP and VIPER
using I
2
S.
The AVIP IC is controlled by the VIPER via the I
2
C bus.
The key part in the system, the VIPER, performs almost all key
features, like video quality enhancement, motion
compensation, picture-in-picture processing, and others. It is a
completely digital IC with a TriMedia DSP (Digital Signal
Processor) core and a MIPS microcontroller core. The DSP
and some additional cores are used to do the video feature
processing and some auxiliary sound feature processing. The
MIPS microcontroller core is used for all internal and external
controlling tasks including a system wide I
2
C bus.
The VIPER provides a primary digital (YUV or RGB) output to
the Pacific 3, which on his turn processes the data to the LVDS
transmitter. For models with the AmbiLight feature, an EPLD is
connected between VIPER output and LVDS Transmitter input.
This EPLD (or MOP) is used for the AmbiLight processing and
some picture enhancements.