Circuit Descriptions
EN 51
Q549.2E LA
7.
2009-May-08
Figure 7-12 Interface between Ambi Light and SSB
7.8.1
ARM controller
Refer to
Figure 7-13
below for signal interfacing to and from the
ARM controller. The ARM controller is located on the DC/DC
board (item no. 7302) or AL panel (item no. 7102).
Figure 7-13 ARM controller interface
Data transfer between ARM processor and LED drivers is
executed by a Serial Peripheral Interface (SPI) bus interface.
The SPI bus is a synchronous serial data link standard that
operates in full duplex mode.
For debugging purposes, the working principle is given below:
•
At startup the controller will read-out matrix data from the
EEPROM devices (via SPI DATA RETURN)
•
Before operation, the driver current is set via SPI, with
driver in DC mode
•
During normal operation the controller receives RGB-,
configuration-, operation mode- and topology data via I
2
C
•
The controller converts the I
2
C RGB data via the matrixes
to SPI LED data
•
Via data return the controller receives error data (if
applicable).
Also PWM clock and BLANK signals are generated by the
controller. The controller can be reprogrammed via I
2
C (via
USB). The controller can receive matrix values via I
2
C, which
will be stored in the EEPROM of each AL module via the SPI
bus. The temperature sensor in each AL module controls the
TEMP line; in case of a too high temperature the controller will
reduce the overall brightness.
7.8.2
LED driver communication (via SPI bus)
Refer to
Figure 7-14
below for signal interfacing between the
ARM controller and the LED drivers on the AL boards, and the
LED drivers and the EEPROMs on the AL boards.
1
83
10_20
3
_090
3
17.ep
s
090
3
17
1
83
10_204_090
3
1
8
.ep
s
090
3
1
8
AR M
S
D A
S
C L
S
E L 1
S
E L 2
S
P I C LO C K
S
P I LA TC H
S
P I D A TA O U T
S
P I D A TA R E TU R N
P W M C LO C K
B LA N K
P R O G
S
P I LA TC H 2
(only on dc/dc for
au
re
a
)
C
S
E E P R O M
TE M P
S
c l1
S
d
a
1
t
b
d
t
b
d
S
c k
P 0 . 7
M O
S
I
M I
S
O
P 0 .
8
Tx D
R x D
R x d 0
Tx d 0
M A T0 .0
M A T1 .0
t
b
d
t
b
d
P 0 . 1 0
1
83
10_205_090
3
1
8
.ep
s
090
3
1
8
A m
b
ilig h t m o d
u
le 1
A m
b
ilig h t m o d
u
le 2
A m
b
ilig h t m o d
u
le N
A R M
L E D
D R IV E R
1
L E D
D R IV E R
2
L E D
D R IV E R
N
S
PI
d
a
t
a
in
S
o
u
t
S
in
S
o
u
t
S
o
u
t
S
in
S
PI c lo c k (
S
C LK)
S
PI l
a
tc h (XLAT )
PR O G (VPR G )
BLAN K
PW M C LO C K ( G
S
C LK)
o
u
t1
6
o
u
t1
6
o
u
t1
6
S
PI d
a
t
a
ret
u
rn
