Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 109
EJ3.0U PA
9.
9.3.4
Diagram B04A/B/C/D/E/F, PNX2018 (IC 7J00)
Figure 9-9 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
G_16840_100.eps
090207
I
2
C-bus
UART
AV link
keyboard
to flat panel
display
PNX8554
PNX8554
PNX8554
PNX8554
video
co-processor
PNX3000
PNX3000
PNX8554
dual or single
HD input
(TDA9975)
speakers
remote
control
PNX2018
MEMORY
BASED SCALER
VIDEO MPEG
DECODER
DEMDEC
DSP
DEMDEC
DSP
AUDIO1
DSP
MUX
VO-2
HUB
DV2
DV1
DV3
DV5
DV4
DLINK1
DLINK2
VO-1
VIP
NORTH TUNNEL
SOUTH TUNNEL
MEMORY CONTROLLER
16-BIT 200 MHz DDR
16
COLUMBUS
AUDIO2
DSP
LVDS
TV MICROCONTROLLER SUBSYSTEM
VIDDEC1
VIDDEC2
12 x DACS
direct sream
30
PNX2018
1
9
17
25
3
11
19
27
7
15
23
5
13
21
29
4
2
6
1
2
10
18
26
4
12
22
30
8
20
28
6
14
T
AD
H
AK
P
AB
F
AH
M
Y
D
AF
K
V
B
A
J
R
AC
G
AJ
N
AA
E
AG
L
W
C
AE
U
ball A1
index area