PG Drives Technology SK78814/1, Техническое руководство, Страница: 19 / 24

PG D
RIVES
T
ECHNOLOGY
R-
NET
IOM - I
NSTALLATION
7.2.4 Pin 5 – Detect
This pin should be linked to 0V inside the input device. This link allows the IOM to detect if the SID is connected. If the link is not
fitted, the IOM should be configured to ignore the absence of the link.
7.2.5 Pins 7 and 9 – 12V 100mA
These pins are connected together inside the IOM and provide a 12V supply to the joystick. The total combined current
capability is 100mA.
7.2.6 Pin 8 – Joystick ground
A 0V supply for the joystick.
7.3 Digital Signal Levels
7.3.1 Pins 1,2,3 and 4 - Direction
Low signal < 0.7V
High signal > 1.4V
Impedance: 132K Ω to 3V
7.3.2 Pin 6 – Fifth Switch
Low signal < 0.7V
High signal > 1.4V
Impedance: 100K
Ω
to 5V
73.3 Pins 7 and 9 – 12V 100mA
These pins are connected together inside the IOM and provide a 12V supply to the input device. The total combined current
capability is 100mA.
7.3.4 Pin 8 – 0V
A 0V supply for the input device.
7.4 On/Off Jack Socket
This section refers to the 3.5mm/1/8” jack socket on the IOM See the connections diagram in chapter 1 for more details.
7.4.1 Signal levels
Low signal < 0.8V
High signal > 4.0V
Impedance: 10K Ω to 5V
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