Pericom Semiconductor Corp., 3545 N. First Street, San Jose, California, USA 408-435-0800
www.pericom.com
Page 4
VDD
I2C Programmable address bit A0
8dB
I2C Data Line
Same as Pin control function
I2C Programmable address bit A1
Don't Care
Don't Care
I2C Clock Line
GND
Input Equalization for Channel B
JP21
16dB
Open
4dB
2dB
VDD
JP22
0dB
GND
Input Equalization for Channel B
3.5dB
Open
P9:A1/B_EM
Pre-emphasis control for Channel B
Tri-level control
Input Equalization for Channel A
Tri-level control by JP25
Setting Value same as P8
P17:
SDATA/A_EQ
Auto slumber mode Enable
High: disable
Low: enable
P18:APD_EN#
P19:
SCLK/A_EM
Pre-emphasis control for Channel A
Tri-level control by JP27
Setting Value same as P9
P10:I2C_EN#
900
I2C Enable
High: pin control
Low: I2C control
Output Swing control for Channel A&B
Tri-level control
P20:SW
667
VDD
JP24
533
GND
Output Swing for Channel A&B
mV(Vtx_diff_pp) at 3Gb/s
Open
I2C Control Function
PIN NAME
PIN Control FUNCTION
P7:EN
P8:A0/B_EQ
Input Equalization for Channel B
Tri-level control
With Internal 100k-ohm pull-up resistor
High: Normal Operation
Low: Power Down Mode
Same as Pin control function
1) Pin
Configurations
Configuration begins with I2C_EN# pin with
JP23
, which must be connected to VDD. The EN pin of the
PI2EQX6811ZDE has an internal 200K pull-up resistor to define a high level default (
JP20
Open) for normal operation.
When EN pin is shorted to GND (
JP20
is shorted to GND), device operation is disabled. This is useful for checking
PI2EQX6811ZDE disabled-state power consumption. Figure5 is pin strap configuration for pin headers.
