PEP CP381, Руководство пользователя

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CP381 Configuration
ID 24107, Rev. 01 © 2002 PEP Modular Computers GmbH Page 4 - 7
4.3.2 Reading Input Data
The input ports are made visible via the Input Data Register. This register reflects the inputs
after them having passed the digital programmable debouncer. An active input appears there
as a logical "1" whereas an open or inactive input port appears as a logical "0". The bit ordering
naturally corresponds with the numbering of the input ports at the connector.
Table 4-2: Input Data Register Bit Map
Bits Type Default Function
31-30 r 0 Reserved
29-0 r - Input (debounced)
Note...
Where the enhanced features such as interrupts, pattern or event detection are
not required, only the input data register is relevant.
Table 4-3: Transparent Input Data Register Bit Map
Bits Type Default Function
31-30 r 0 Reserved
29-0 r - Input (transparent)
Note...
In addition to the Input Data Register, there is a second non-latched input regis-
ter (debouncer bypassed).