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PMC251
Functional Description
ID 19942, Rev. 0100
Page 2 - 3
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PEP Modular Computers GmbH
2. Functional Description
2.1 PMC251 Address Map
The PMC251 CPU360 address map shown in the table below is based on the recom-
mended default initialization of 68360 chip select logic.
2.2 Board Control/Status Register
An additional register for PMC251 control and status purposes is implemented in the
glue logic part of the QUICC-QSPAN interface. This register can also be accessed from
the PCI and the local side (QBus).
Table 2-1: PMC251 Address Map
Address (Hex)
Device
HEX 00 xx xx xx
SRAM
HEX 04 xx xx xx
SRAM
HEX 07 00 0x xx
68360 internal RAM / register
HEX 0A xx xx xx
QSPAN configuration / status registers
HEX 10 00 00 00
PROFIBUS Interface
HEX 0C xx xx xx
RTC
HEX 0D xx xx xB
board control/status register
HEX 40 00 00 00
PCI image 0
HEX c0 00 00 00
PCI image 1
Address:
CS7 + HEX B
Format:
Byte
Access:
Read/Write
Value after reset:
HEX 00
Table 2-2: Board Control/Status Register Bitmap
7
6
5
4
3
2
1
0
WDG
S_BRB
BERR1
EN_WDG
TR_WDG
EN_BERR1
ABORT
LED_G
Содержание PMC251
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