Panasonic TH-L42S10R, Руководство по обслуживанию

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TH-L42S10R
6
1.3. KM03 Chasis Block Diagram
TUNER
PWB
Hong Kong Digital
FE
S(5 o
r 6)
/3
.3
SDRA
M
TUNER
TS Paralle
l
O
N
Fi
x (
H
a
rd
)
S5
V
CI
P
O
W
ER
-
SW
P>CI_POWER_ON P<
CI_OCP
S3.3/1
.8/1
.2
M_SND
S5
M3.3 S3.3 S3.3 S3.3
AV
-
SW
R2A
11
01
4
F
T
Vide
o
Au
d
io
SW
SL
V
[9
0
]
HD
/V
D
/FB
K
MUT
E
S
T
B
_
XR
ST
5VS/STB5/S5/DTV
12
S3.3
10M
Hz
S3.3
S3.3
S3.3/S5
S3.3
S3.3/S5
P> F
E
_SW
Opt
Di
git
al
OUT
CVBS
S3.3/S1.8
S9/S5
HP
AMP
MA
IN
AMP
A
V-OUT
M
O
NITOR
OU
T
CVB
S
L/R
HP_O
UT
L/R
AV
-I
N
YU
V
CVB
S/
S
L/R
YU
V
CVBS
/S
L/R
CVBS
L/R
PC
RG
B
HS/
V
S
A
D
V7470
SLV[
4
0
,etc]
HD
MI
-R
x
*4
AD
-I
N
Y/C
VB
S
Pb
/C
Pr RG
B
_
CVBS
SOY
RG
B_F
B
PC
_HS
PC_VS
INT
ADV_RE
SE
T
SI
F
S3.3/S1.8
HDMI
G>HPD G<5
V_D
E
T
G<C
EC
A
V_L
/R
MONI
TOR
_OU
T
L/R
AM
T
V_L
/R
L/R
L/R L/R
MAI
N
VI
DE
O
TU
-C
VB
S
FE
W
J
C
E
6553
SL
V[
1
E
]
S5/S30
TU
NER
SW1
/2
mo
n
o
SI
F
IF
AG
C
IF
PWM_OUT *
1
Opt
CI
Card
TS
SW
3.
3-
5V
L
eve
l
Shift
TS
Buf
fer
CI
ASIC
#W
E/
#R
E
#I
OWR
/#
IO
R
D
#R
EG
Bu
ffe
r Ct
rl
#C
D
#I
R
E
Q
#W
A
IT
Peaks-AVC
31mm
IIC0 IIC1 IIC2 IIC3
G>
AU
DIO_X
RS
T
IRQ3
74.
25
MHz
27M
Hz
27M
Hz
12M
Hz →
n
o
n
us
e
25M
Hz
→
for
LAN
9
1
1
8
IC
S
CL
K
G
E
N
w/
t
VCX
O
S1.8
TS Ser
ia
l
TS Par
all
e
l
HSD
IN
VI1CLK
OUT
RGB 30bit
H,V
,CLK
A
P
or
t
Video DAC
IECO
U
T
Audio
Discr
iption
I2S
I2S
R
T
L
8
100
CL-
LF
Re
se
t
25M
Hz
Fr
o
m
C
L
K
G
EN
Et
h
e
r
C
onne
c
te
r
ADDR
&
D
AT
A
32bit +4bit
EE
P
1k
S3.3
A
na
log
A
S
IC
B
D
865
1
GenX
8
SLV[
70]
SB
O2
SB
I2
E
EPWP
II
C_1
SD
-B
OO
T
STB
3.
3
EEP
8
k
S
L
V
[A
0}
STB
3.
3
Su
p
por
t c
a
rd
c
o
nn
ec
to
r
NAC
E,C
E
1
C
LE
1
AL
E
1
WE
1
WP
BY
RE1
NO
R
F
la
sh
2
5
6M
bi
t
XR
S
T
CS
0
S3.3
STB
3.
3
OUT
RE
SET
HP
G>
AD
V_X
R
S
T
LVDS
-1st
LVDS
-2nd
USB
-IF
TS Paralle
l
PWMA PWMK
LOS
D
G> D
T
V_
VOU
T
E
NB
AVC
S
y
st
e
m
MW
: NONE
SD:
ONBOARD
SD
-IF
BLUE-LED
: NON
E
S3.3
E
E
P
16
k
S
L
V[
A
0
}
S3.3
TE
MP
S
E
N
S
E
S
LV
[A
0}
RM
T
/
K
E
Y
V-
PW
B
STB3.3/S5
G
>
S
D
_LED_ON
G>
G_L
ED_ON
G>
R_L
ED_ON
G>
AC
TIV
E_S
TBY_L
ED_ON
G< R
M
IN
G< AI
_SEN
SOR
G< KE
Y1
PCI BUS /VOUT
IS
0
CH
0
FS
NO
NE
OVP SOS G>MON_MU
T
E
G>SP_HP_MU
TE
AMP
/HP_MU
TE
MONI
TOR
OU
T_MU
T
E
G< T
V
_SO
S
P
>
CI
_
X
RST
P> E
EPR
OM_WP
G> E
E
PROM_WP
P
e
a
k
s_X
RST
Peak
s
POWER
_D
E
T
RE
SET
POWER
_D
E
T
G>D
T
V_XR
S
T
G>SW_O
F
F
_
D
E
T
DD
R2
800
M
H
z
DD
R2
8
0
0MHz
CPU B
U
S
A
D
D
R
E
SS E
A
[2
5:
2
4
],
E
A
[7
:0
]
DA
TA E
D
[15
:0]
B
po
rt
/ A
D
D
R
E
SS E
A
[2
3:
8
]
Y
C
16bit
H,V
,CLK
ADDR
E
S
S
EA
[25
:0
]
DA
TA
ED
[1
5:
0]
ADDR
E
S
S
EA
[7
:1
]
DA
TA
ED
[7
:0}
ADDR
E
S
S
CI
_
E
A
[1
5
:1
]
DA
TA
CI
_E
D[7
:0]
5-3
.3
V
L
eve
l
Shift
P> XE
T
S
_C
I
S3.3/S5
P>
F
E
1_IRQ
P< F
E
_XR
S
T
P> FE_IRQ P< F
E
_XR
S
T
AMP
/HP_MU
TE
(G>
S
P_H
P_M
U
T
E
)
M
O
N
IT
O
R
O
UT
_
M
UTE
(G>MON_MUTE)
PWMA PWMK
G>PWM_POW_ON
G<I
NV
ER
T
E
R
_SO
S
LVDS Dual
PWM ADI
M
Fil
ter
M9
LCD PANEL
G>I
NV
ER
T
E
R
_ON
G>PA
NE
L_
TE
S
T
_ON
PNL_
VCC
AD
V
II
C
AD
A
V
II
C
24.
5
7
6
MHz
to AD
A
V
Blo
ck
ADV C
L
K f
rom AD
A
V
MC
LK ou
t
AD
A
V
MC
LK
AD
V C
L
K
30MHz
30.4MHz
TS Serial
TS Paralle
l
II
C_0
L/R
S
P
G<S
OUND
_S
OS
AMP
/HP_MU
TE
(G>
S
P_H
P_M
U
T
E
)
SD-IF
N
A
ND-IF
S3.3
NA
ND
F
la
sh
DA
TA
ED
[7
:0]
XN
FC
E,XN
F
WE,
X
N
FR
E
N
F
AL
E,N
FC
L
E,XN
F
W
P
NAN
DR
YB
Y
S3.3
SD
Ca
rd
EA
[23
:8
]
ED
[1
5:
0]
G>
AD
V_X
R
S
T
A
D
AV
_
R
E
SE
T
PWM OUT *
2
HP_OUT
P
W
M
_
R
E
ADY
SPD
IF_OU
T
SPD
IF_I
N
DTV_I2
S
_
IN
HD
MI
_
I2S_
SP
D
IF
OU
T/I
N