15.2. Main Block Diagram
STB3.3V
DC/DC
1.8V
PULSE
128Mbit
DDR
Genx4
PROCESSOR
C35
D20
Y,Pb,Pr
C33
C30
S.R.
SUS
B[9:0],HD,VD
SCAN DRIVE
DDR2x2
S.R.
15V
AUDIO OUT
Discharge
Control(SS)
VCXO
S.R.
Vda
P9
AV3 IN
S.R.
VDA_75V
TV
VOLTAGE
RECTIFIER
SIGNAL
P3.3V
DTV_V
S.R.
Discharge
Control(SC)
S.R.
RECTIFIER
S.R.
FAN
S.R.
D36
ERASE
Data Driver
Control
P5V
SS
SQ-R
END
(VE)
W-R
V
SS35
HDMI
DCLK
PULSE
PC IN
RECTIFIER
P5V
VSUS
P5V
SCAN
PULSE
HDMI_SDIN
Vda
PROTECTION(SOS)
FAN CONTROL
FPGA
35
SUSTAIN
L/R
CH0DATA
WRITE PROTECT
REG
RESET
7V
PLASMA AI PROCESSOR
FILTER
LINE
DG
SENSOR
AUDIO IN
SOS6
D3
SUB9V
SOS
PROCESS
DATA0
S-VIDEO IN
P10
G[9:0]
*H,V Snyc Control
CONTROL
R
PROCESS
HDMI_SPDIF
G51
K2
P12
SOS8
TEMP
SPEAKER
SC20
SS23
AUDIO
POWER
H12
MICON
PROM
SUSTAIN
REMOTE RECEIVER
*RGB:10bit(or8bit)
SW
PD1-M plus
ADDRESS
GS
TUNER
VSUS
SOUND_SOS
DATA DRIVER(LEFT)
SOS6
DG
AV TERMINAL
SOS8
POWER LED
CONVERTER
HDMI IN 1
MAIN_L/R
AV SWITCH
R,G,B
C4
H51
Data Driver
Control
S2
D35
H
Vda
STB12V
VDA_75V
+15V
PC
P5V
DDR
AD/HDMI
SQ-L
F+15V
S.R.
REMOTE/LED/KEY SW
*LVDS receiver
W-L
VDA_75V
IF_2
*Plasma AI
DG5
SPEAKER
DC/DC
1.2V
DATA DRIVER(RIGHT)
R
C2
P1.2V
D5
GP5P_1st
C1
STBY5V_M
DATA DRIVER(LEFT)
VOLTAGE
P5V
(4MByte)
(CYCLONE)
VDA_75V
PCLK/NCLK
*Discharge Control
FPGA
SS11
+15V
VIDEO2
DISPEN
S.R.
H5
CLOCK
K1
+15V
C11
L/R
AMP
D34
FORMAT CONVERTER,
FACTOR
R[9:0]
Y,C,V
C10
32Mbit
Flash-ROM
VOLTAGE
MONITOR
MAIN
SC
CONTROL
VOLTAGE
SUB5V
L/R
LINE
AI SENSOR
POWER SW
SD CARD SLOT
VOLTAGE
L
CONTROL
RELAY
POWER
STB_PS
COMP2
H11
P_ON/OFF
H30
CONTROL
ICEOUT
ASDIO
VOLTAGE
SWITCH
D25
VOLTAGE
FILTER
DRVRST
PB30
FAN_SOS
L/R
XRST
L/R
Peaks-Lite 2
GENERATOR
S.R.
S.R.
RESET
P5
PULSE
S.R.
S.R.
DC/DC CONVERTER
D
+5V
DATA DRIVER(RIGHT)
S
S.R.
S.R.
DC/DC
3.3V
RECTIFIER
Vda
SC2
SOUND
S.R.
STANDBY
POWER_SOS
AC CORD
C40
RESET
P
AV3 IN
MICOM
P2.5V
Y,Pb,Pr
DG1
STANDBY
KEY SCAN
H10
RF_L/R
PULSE
SOS
OPTICAL
Y,C,V
VIDEO1
AUDIO IN
GENERATOR
RF_V
15V
VIDEO IN
G
DTV
SPEAKER
MAIN9V
L/R
*VD,HD
VIDEO
S.R.
L/R
*Sub Filed Processor
S.R.
DTV_SDIN
S.R.
S.R.
Vda
S.R.
S.R.
P25
+15V
DIGITAL SIGNAL PROCESSOR
S.R.
IF_1
SUSTAIN
Y,C,V
K
OUT
SOS7
PRO.
FRONT
P11
C23
C20
P2
VSUS
DVI
VDA_75V
DRIVE
SUSTAIN
PS_SOS
RECTIFIER
CONTROL
AVR
PB
L
+15V
SOS7
POWER SUPPLY
DG52
COMP1
5V
[27MHz]
DC-DC
STB5V
OSD
X'tal
AUDIO IN
D33
*CLK
BOOT
ROM
VOLTAGE
FLASH CONTROL
12V
+15V
HDMI IN 2
L/R
F_STB+15V
SOUND15V
LVDS format
AMP
D32
H3
EEPROM
AMP
D31
DG3
VDA
PCLK/NCLK
64k
NOR
FLASH
S.R.
C3
P5V
SD CARD SLOT
S.R.
SUSTAIN DRIVE
SW
S.R.
+15V
S.R.
+12V
MAIN
SS33
VDA_75V
+12V(s)
SS12
IIC2
GS52
DCK
Vda
PB37
PB32
PB34
PB31
64
64
64
S.R
S.R
S.R
S.R
S.R
14
64
64
S.R
S.R
64
S.R
64
S.R
S.R
S.R
S.R
14
S.R
64
S.R
S.R
14
64
64
64
S.R
S.R
S.R
S.R
SD
S.R
14
SCAN OUT
(UP)
64
64
64
64
SCAN OUT
64
SU
(DOWN)
C42
C32
C41
VDA_75V
C22
C12
S.R.
S.R.
TH-42PZ700U
Main Block Diagram
TH-42PZ700U
Main Block Diagram
TH-42PZ700U
68
Содержание TH-42PZ700U - 42" Plasma TV
Страница 4: ...1 Applicable signals 4 TH 42PZ700U ...
Страница 19: ...8 Location of Lead Wiring 8 1 Lead of Wiring 1 19 TH 42PZ700U ...
Страница 20: ...8 2 Lead of Wiring 2 20 TH 42PZ700U ...
Страница 21: ...8 3 Lead of Wiring 3 21 TH 42PZ700U ...
Страница 22: ...8 4 Lead of Wiring 4 22 TH 42PZ700U ...
Страница 23: ...8 5 Lead of Wiring 5 23 TH 42PZ700U ...
Страница 24: ...8 6 Lead of Wiring 6 24 TH 42PZ700U ...
Страница 25: ...8 7 Lead of Wiring 7 25 TH 42PZ700U ...
Страница 29: ...9 4 No Picture 29 TH 42PZ700U ...
Страница 36: ...11 4 Adjustment Volume Location 11 5 Test Point Location 36 TH 42PZ700U ...
Страница 38: ...38 TH 42PZ700U ...
Страница 40: ...40 TH 42PZ700U ...
Страница 67: ...15 Schematic and Block Diagram 15 1 Schematic Diagram Note TH 42PZ700U 67 ...
Страница 136: ...TH 42PZ700U 136 ...
Страница 137: ...16 Exploded Views Replacement Parts List 16 1 Exploded Views 137 TH 42PZ700U ...
Страница 138: ...16 2 Packing Exploded Views Accessories 138 TH 42PZ700U ...
Страница 139: ...16 3 Packing Exploded Views Stand 139 TH 42PZ700U ...
Страница 140: ...16 4 Replacement Parts List Notes 140 TH 42PZ700U ...