Panasonic TH-32A410R, Руководство по обслуживанию

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TH-32A410R
26
9 Block Diagram
9.1. Main Block Diagram
Panel
S5/ S3.3
S3.3
NAND
Flash
1G
XNFCE,XNFW
P
NFCLE,NFALE
XNFWE,XNFR
E
NANDRYBY
NFD[7:0]
Support
Card
DTV_XRST
CPU BUS
BOOTSWAP
XRST
XRSTSTM
XERWE0
XERWE0
XECS1
ERXW
ES0
ES1
ES2
ED[
䋷 䋷
:0]
AAR/DATA CTRL
ED[7:0]
PCOE
PCWE
PCIORD
PCIOWR
PCRESET
PCCE1
PCWAIT
PCCD1
PCCD2
PCREADY
CI-IF
DMD
P-IIC2 (For DMD only)
ADC
DTV Decoder
SIF Decoder
IPR INS
Analog Video
Processor
Video
Format
Processor
VIF Decoder
I2S
SW
AMP
PWM
SPDIF
SW
A-Chip
CLK
GEN
A-D Chip
Internal BUS
IIC
DMD-IIC0
DMD-IIC1
Trans Port Decoder
CPUBUS NAND-IF
Peaks
sLD8A
STB3.3
IIC
STM-IIC
Serial
STM-Serial0
STM-Serial1
25MHz
STM
USB
S5
USB
Power SW
USB2VBUS >
< USB2OC
S5
S5
USB Memory
USB-IF
᧤ 3port ᧥
< KEY1
POWER KEY
CONTROL PANEL KEY
Cross Stream Switch
D-Chip
IIC
P-IIC0
P-IIC1
Serial
P-Serial0
P-Serial1
P-UART0
P-UART2
DMD IIC
DMD_IIC0
DMD_IIC1
DSP
HDMI
Rx
MUX
x3
LVDS-Tx
mini-LVDS-Tx
DDR-IF
S1.5
DDR3+(1333)
x16
Tc
o
n
(+
F
RC:B
7
0
/BL
7
0
)
Back Light
INVERTER
or
LED Driver
BL_ON >
BL_SOS <
S12
Peaks
DCDC
䋨
VM
䋩
S1.1 S1.5 S3.3
STB3.3
STB_XRST
< TV_SOS
AMP/HP MUTE
MONITOROUT MUTE
S12/S5 STB5/5VS
Analog
ASIC
AN34043A
OVP
SOS
Safety
Circuit
< MON_MUTE
< SP_HP_MUTE
STB3.3V/1.2V_REG
STB5V Reset IC (STM)
S9V_REG
S12V Reset IC (Peaks)
Audio MUTE
OCP/OVP/TV-SOS
HP_MUTE,EXT_MUTE
UHS-I_REG
TV_SOS
PW M
3.3/1.8
UHS-1
REG
3 3 3 3 / / 1 1 8 8
S9-REG
S9
(SD-Data-VCC)
< (SDVOLC)
DCDC_EN
DTV_XRST >
SW_OFF_DET >
XRST
POWER_DET
PWM >
PWMA
PWM >
< KEY3
LVDS
HD : (DATA 4pairs / CLK 1pair) single8bit
FHD: (DATA 4pairs / CLK 1pair) dual8bit
DDR3
AIO
VIO
V-SW
A-SW
LAN
ETHER
PHY
SD-IF
JTAG
JTAG
DDR3+(1333)
x16
S1.5
AFB
S12
S3 3 3
DC DC
D T T
SW W
Peaks
DCDC
SOUND_VCC
AMP
LIN1, RIN1
Optical OUT
OPT
DDC* > STM, Peaks
HPD* < STM
HDMI_5V_DET* > STM
HDMI1
DDC* > STM, Peaks
HPD* < STM
HDMI_5V_DET* > STM
HDMI2
Rx*
Rx*
IECOUT
Y1,Pb1,Pr1
HS1BCLKIN
HS1SYNCIN
HS1VALIN
HS1DIN0
HS1DIN1
HS1DIN2
HS1DIN3
HS1DIN4
HS1DIN5
HS1DIN6
HS1DIN7
HS1DIN8
TS-IN
S3.3 / TU1.8
Terrestrial(1)
or
Terestllial/cable(2)
IF_AGC1
1stLow_IF 䇮 IFAGC
Terrestrial
DMD_IIC0
Low -IF2
< FE_XRST 䋾
Demod.
DCDC
1.2V
S3.3
cable
IF_AGC2
Low -IF1
2ndLow_IF,IFAGC
CXD2840/2837
< FE_XRST 䋾
DMD_IIC1 (IIC2)
S3.3
HK/CHINA: DTMB
Colombia/Vietnum: T2
ALRCKO
ASDOUT0
ABCKO
ASMCK
ARCOUT
V1
AV2(SIDE) INPUT 䋨 CVBS)
Lin3,Rin3
●
● ●
USB
S5
USB
Power SW
USB1VBUS >
< USB1OC
S5
S5
SD CARD
● ●
Lout2,Rout2
Only for study
USB1DP/N
USB2DP/N
S5
USB
Power SW
USB0VBUS >
< USB0OD
S5
S5
USB0DP/N
WiFi Module
B7/B70: 1G+1G
(Brazil 2G+2G)
BL7/BL70: 2G+4G
PANEL_TEST_ON
SCL0/SDA0(B70/BL70)
B/B70: 1G
(Brazil: 2G)
BL model: 4G