Panasonic SJ-MJ75, Руководство по обслуживанию

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terminal
Pin
No.
Mark I/O
Division
Function
73 SMON0 O Monitor signal 0 output
terminal
(Not used, open)
74 FSEQ O Flame detection signal
output terminal (Not used,
open)
75 VP O CLV servo clock
judgement signal output
terminal (Not used, open)
76 MCST — Not used, open
77 MRASB O RAS signal to DRAM
output terminal (Not used,
open)
78 FOK O Focus OK signal output
terminal
79 MWEB — Not used, open
80 DEFECT O Defect signal output
terminal
(Not used, open)
81 MD1 I/O Data in/output terminal to
DRAM
(Not used, open)
82 FG I Speed pulse input terminal
83 CL I CPU interface data clock
input terminal
84 CE I CPU interface chip enable
signal input terminal
85 MD0 I/O Data in/output terminal to
DRAM
(Not used, open)
86 DI I CPU interface data clock
input terminal
87 VDD1 I Power supply terminal
88 DO O CPU interface data output
terminal
89 VDD2 I Power supply terminal
90 VSS — GND terminal
91 MD3 I/O Data in/output terminal to
DRAM
92 WRQB O CPU interface interrupt
signal output terminal
93 INTB O CPU interface interrupt
signal output terminal
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