J
PLAY
1KHz, 0dB
2.2V
P-P
3.2V
1.5V
1.5V
3.2V
0.5V
1.6V
1.6V
1.6V
1V
1.5V
((3.2V))
0V
0V
3.2V
((0V))
0V
1.6V
1.6V
1.6V
1.6V
1.6V
1.6V
1.6V
1.6V
1.6V
1.6V
1.6V
3.2V
((0V))
3.2V ((3.1V))
0V ((3.1V))
0V ((0.2V))
0V
3.2V
1.6V
0.5V
3.2V
3.2V
3.2V
3.2V
2.9V
1.5V
1.5V
2.9V
3.2V
3.2V
T = 13.3ms.
PLAY
3.2V
0V
T = 13.3ms.
0V
PLAY
...3.2V
T = 13.3ms
PLAY
3.2V
0V
T = 13.3ms
PLAY
...3.2V
0V
PLAY
F=75Hz
...3.2V
0V
3.1V
1
3
5
7
9
8
6
4
2
10
11
12
13
14
15
16
17
18
19
CN702
40
41
42
43
39 38 37 36 35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
44
17
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61 62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
80
1
R753
10
0
R709
68K
R71
1
82K
R717
1K
R721
100
R718
1K
R712
220
R741
47K
R742
220K
C722
10P
C721
10P
C753
470P
C733
0.1
C718 0.22
C744
8200P
C717
0.1
C716
820P
C724
0.1
C726
1000P
C725
1000P
C730
0.1
C754
470P
C745
1000P
C732
6.3V220
C727
50V1
C728
50V1
C731
6.3V220
C723
10V220
S701
X701
16.9344 MHz
(SPEED)
MLD
M DATA
MCLK
P.GND
+7.5V
TX
D.GND
LD SW
+3.3V
REST SW
/RST
STAT
SUBQ
SQCK
RESY
SSEL
BYTCK
DEMPH
IN
DVSS1
DVDD1
VDD
AVSS2
AVDD2
OUT
/CLDCK
FCLK
IPFLAG
FLAG
CLVS
CRC
/TEST
AVDD1
AVSS1
RSEL
PSEL
MSEL
BCLK
LRCK
SRDATA
TX
MCLK
MDATA
MLD
SENSE
/FLOCK
/TLOCK
BLKCK
SQCK
SUBQ
DMUTE
STAT
/RST
SMCK
TVD
PC
ECM
ECS
TRD
FOD
VREF
FBAL
TBAL
FE
TE
RFENV
VDET
OFT
TRCRS
/RFDET
BDO
LDON
WVEL
ARF
IREF
DRF
DSLF
PLLF
EFM
PCK
SUBC
SBCK
VSS
X1
X2
OUTR
OUTL
A.GND
PLLF2
VCOF
VCOF2
IOSEL
IOVDD
CSEL
DSLF2
KICK
TRV
REST SW
Rch OUT
Lch OUT
18
23
22
21
17
12
7
6
4
3
16
15
702
(Vref)
SERVO PROCESSOR
DIGITAL SIGNAL PROCESSOR/
DIGITAL FILTER/
D/A CONVERTER
: + B Line
: CD Signal Line
SCHEMATIC DIAGRAM-2
C743
0.1
BLKCK
8
1
R714
TO
PANEL
CIRCUIT
(CP606) ON
(SCHEMATIC
DIAGRAM-7
0.6V
P-P
1.6V
P-P
F=16.9344MHz
F=16.9344MHz
0.7V
P-P
11
10
9
PLAY
0.5us 0.2V/DIV
2ms 0.1V/DIV
0.1V
P-P
PLAY
PLAY
2ms 0.1V/DIV
0.4V
P-P