72
KX-PRX120W/KX-PRXA10W
buck output current loop keep as short as possible
(I MAX_200mA)
(I MAX_300mA)
(I MAX_200mA)
(I MAX_10mA)
(I MAX_100mA)
(I MAX_300mA)
(I MAX_10mA)
(I MAX_5mA)
(I MAX_5mA)
(I MAX_10mA)
(I MAX_10mA)
(I MAX_450mA)
(I MAX_300mA)
(I MAX_300mA)
buck input current loop (K3 and J4 ) keep as short as possible
AVSS55_SMPS (J4) connect to bypass cap first and to GND
(MSDC IO Level)
(IO Level)
POWER
GIO
If DVDDIO_SDIO=1.8V, please change SDIO driving
level from level_0 to level_4 by SW.
E10
RTCCLK_O
F10
RTCCLK
G9
VCCRTC
G7
AVSSRTC
G5
DVDD
E6
DVDD
C9
DVDD
G6
DVSS
F7
DVSS
C10
DVSS1
B8
XTEST
H8
WIFI_INT_B
K7
BGF_INT_B
L7
SYSRST_B
G8
FSOURCE_WR
D9
UART_RTS
E9
UART_CTS
F9
UART_RXD
E8
UART_TXD
F8
I2S_CLK
E7
I2S_WS
D7
I2S_DATA_OUT
A10
PCM_CLK
B10
PCM_OUT
D10
PCM_SYNC
A9
PCM_IN
H7
SDIO_CLK
J7
SDIO_CMD
H6
SDIO_DAT0
J5
SDIO_DAT1
H5
SDIO_DAT2
J6
SDIO_DAT
3
C8
DVDDIO
H4
DVDDIO_SDIO
U1001-E
MT6628Q_WLCSP
L2
AVDD55_MISC
K1
AVSS55_MISC
J3
AVDD25_V2P5NA
L5
AVDD28_PLL
G2
AVDD25_V2P5
K5
AVSS28_PLL
K3
AVDD55_SMPS
J4
AVSS55_SMPS
J1
AVDD28_TLDO
H1
AVDD28_TLDO_SW
H2
AUX_REF
G3
PMU_EN
H3
PMU_DSB
L1
VREF
J2
AVDD17_CLDO_IN
L3
LXBK
K2
CLDO
L4
WFLDO
F1
RF_I_CAL
U1001-A
MT6628Q_WLCSP
0402
C1001
100nF
0402
C1030
100nF
0402
C1029
NC
0402
R1024
10K
0402
C1031
100nF
0402
C1032
100nF
0603 C1003
4.7uF
0603
C1009
4.7uF
0402
C1007 1uF
0402
C1004
100nF
0402
C1010
1uF
0402
C1017
1uF
0402
C1016
1uF
0402
C1043
2.2uF
0402
C1042
1uF
0603
C1044
4.7uF
0402
R1019
1M
L1002
LQM2HPN2R2MG0 (2.2uH)
0402
R1001
0R
0402
R1002
NC
CLDO
WFLDO
AVDD17_SMPS
VBAT
CLDO
VRTC
VDD1V8_PMU
VDD28_PMU
[2]
GPIO_6620_PWR_EN
[8]
AVDD28_TLDO_SW
[8]
AVDD28_TLDO
EINT14_GPS
EINT1_WIFI
[2]
I2S1_WS
[2]
I2S1_DAT
[2]
I2S1_CK
[11]
PCMCLK
[11]
PCMOUT
[11]
PCMIN
[11]
PCMSYNC
[2]
URXD3
[2]
UTXD3
MC3DA0
MC3CMD_BB
MC3DA1
MC3DA2
MC3CLK_BB
MC3DA3
DAIRST
[2,3] RTC_GPIO_2V8
AVDD25 _V2P5
CLDO
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]