Panasonic KX-NCP1000GR, Руководство по обслуживанию

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138
KX-NCP500GR
23 EXTAL2 I RTC crystal resonator
24 VDD-RTC - RTC VDD
25 VSS-RTC - RTC GND
26 VSSQ-DDR - DDR I/O GND
27 VCCQ-DDR - DDR I/O VCC
28 BKPRST# I Back-up reset
29 CKE O DDR clock enable
30 MA13 O DDR address
31 MCAS# O DDR CAS
32 MCS# O DDR chip select
33 BA1 O DDR bank address 1
34 MA0 O DDR address
35 MA2 O DDR address
36 MA4 O DDR address
37 VSS - Internal GND
38 DRAK2#/ CE2A#/
AUDCK O/O/O DMA channel 2 transfer request acknowledge/PCMCIA CE2/H-UDI emulator
39 DREQ1# I DMA channel 1 request
40 DACK0#/MODE0 O/I DMA channel 0 bus acknowledgement/mode control 0
41 DACK3#/IRQOUT#/
AUDATA3 O/O/O DMA channel 3 bus acknowledgement/interrupt request output/H-UDI emulator
42 TDO O H-UDI data
43 AUDCK/FALE O/O H-UDI emulator/NAND flash ALE
44 AUDATA0/FD0 O/IO H-UDI emulator/NAND flash data
45 SIOF_RXD/
HAC_SDIN/SSI_SCK I/I/IO SIOF receive data/HAC serial data incoming to Rx frame/SSI serial bit clock
46 SCIF1_SCK/MCCMD IO/IO SCIF1 serial clock/MMCIF command response
47 SCIF0_RXD/
HSPI_RX/FRB I/I/I SCIF receive data/HSPI receive data input/NAND flash ready or busy
48 TCLK/IOIS16# IO/I TMU clock/PCMCIA IOIS16
49 XRTCSTBI# I RTC standby
50 VSSQ - I/O GND
51 MDA0 IO DDR data
52 VCCQ-DDR - DDR I/O VCC
53 VSSQ-DDR - DDR I/O GND
54 VCCQ-DDR - DDR I/O VCC
55 MA12 O DDR address
56 MA11 O DDR address
57 MA9 O DDR address
58 MA8 O DDR address
59 MA7 O DDR address
60 MA6 O DDR address
61 MA5 O DDR address
62 DRAK0#/MODE2 O/I DMA channel 0 transfer request acknowledge/mode control 2
63 DRAK3#/CE2B#/
AUDSYNC O/O/O DMA channel 3 request acknowledgment/PCMCIA CE2/H-UDI emulator
64 DREQ2#/INTB#/
AUDATA0 I/I/O DMA channel 2 request/PCI interrupt B/H-UDI emulator
65 DACK1#/MODE1 O/I DMA channel 1 bus acknowledgement/mode control 1
66 TCK I H-UDI clock
67 ASEBRK#/BRKACK I H-UDI emulator
68 AUDATA3/FD3 O/IO H-UDI emulator/NAND flash data
69 SIOF_SCK/
HAC_BITCLK/
SSI_CLK IO/I/IO SIOF serial clock/HAC/SSI serial bit clock
70 SIOF_TXD/
HAC_SDOUT/
SSI_SDATA O/O/IO SIOF transmit data/HAC serial data/SSI serial data
71 SCIF0_RTS#/
HSPI_CS#/FSE# IO/IO/O SCIF modem control/HSPI chip selection/NAND flash spare area enable
72 SCIF0_TXD/HSPI_TX/
FWE#/MODE8 O/O/O/I SCIF0 transmit data/HSPI transmit data/NAND flash write enable/mode control
8
73 SCIF0_SCK/
HSPI_CLK/FRE# IO/IO/O SCIF0 serial clock/HSPI serial clock/NAND flash read enable
74 VDDQ - I/O VDD
75 IRQ/IRL7#/FD7 I/IO IRL IRQ interrupt request 7/NAND flash data
76 MDA1 IO DDR data
77 MDA16 IO DDR data
Pin No. Pin Name I/O Function