44
KX-DT543/KX-DT543-B/KX-DT546/KX-DT546-B
11 Schematic Diagram
11.1. Main No.1
DG
DG
DG
SPI2_DO
PCM_RXD
PCM_TXD
PCM_FSYNC
SPI2_DI
PCM_SCLK
SPI2_CS
SPI2_CLK
RESET
CK4M
VCC33
PEP1
PSYNC
DG
INTN
DG
R324
820
R323
1M
GPIO3
GPIO4
C323 0.1u
C324
0.1u
C326 0.1u
C327 1000p
C328
1000p
C329
1000p
C362
0.01u
16
X301
16.384M
C566
NC
AGND
DG
R561
NC
PG
DG
R562
NC
R330
1k
C563
0
C564
0
C565
0
C567
0
R332
1k
R331
1k
R333
270
C572
0
C573
0
C383
7p
C382
7p
R334
R571
NC
R572
NC
R573
0
AGND
DG
IC300
13 CK4M
14 VSS2
15 GPIO0
16 VSS3
17 GPIO1
18 GPIO2
19 VDD1
20 GPIO3
21 DVRL
22 DDR
23 DVRH
24 NC1
25
GPIO4
26
PVRL
27
PDR
28
PVRH
29
NC2
30
VDD2
31
VSS4
32
PDX1
33
PDX0
34
GPIO5
35
GPIO6
36
GPIO7
37
VSS5
38
OSI
39
OSO
40
VSS6
41
INTN
42
VSS7
43
VDD3
44
NC3
45
STEST0
46
STEST1
47
DDX0
48
DDX1
1
RSTN
2
OSR
3
OEP0
4
OEP1
5
OSYNC
6
VSS1
7
OCLK
8
OSX
9
SPITX
10
SPIRX
11
SPICLK
12
SPICS
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
KX-DT543/KX-DT546 MAIN BOARD NO.1 (1/2)
(4) Clock (IC300:ASIC1) 16.384MHz
(8) IC300(ASIC1) - IC410(DCX81) signal (Reset)
(9) IC300(ASIC1) -IC410(DCX81) signal (SPI2)
(10) IC300(ASIC1) - IC410(DCX81) signal (PCM)
(11) DPT - PBX signal (Receiving signals)
(16) DXDP signal (Receiving signals)