Panasonic FP Series, Руководство по программированию

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High-speed counter instructions
906
Part
III F
P
Instructions
PLC type FP0, FP-e
FP
 FP-X (Relay
types) FP-X
(Transistor
types) FP0R
Interrupt 3
Channel 2 Channel 2 Channel 3 Channel 3 Channel 2
Interrupt 4
Channel 3 Channel 3 Channel 4 Channel 4 Channel 3
Interrupt 5
Channel 5 Channel 5
Interrupt 6
Channel 6 Channel 6 Channel 4
Interrupt 7
Channel 7 Channel 7 Channel 5
Interrupt 8
Channel 8
Interrupt 9
Channel 9
Interrupt 10
Interrupt 11
Channel A
Interrupt 12
Channel B
General programming information
 Select the high-speed counter input for the desired channel in the system
registers.
 FP-X, FP0R: When a high-speed counter instruction is executed, the high-speed
counter control flag (e.g. sys_bIsHscChannel0ControlActive) for the channel
used turns to TRUE. No other high-speed counter instruction using the same
channel can be executed as long as the control flag is TRUE.
 FP0, FP-e, FP

: The high-speed counter control flag (e.g.
sys_bIsHscChannel0ControlActive) and the pulse output control flag (e.g.
sys_bIsPulseChannel0Active) are assigned to the same internal relay (e.g.
R903A). Therefore, when a high-speed counter instruction or a pulse output
instruction is executed, both the high-speed counter control flag (e.g.
sys_bIsHscChannel0ControlActive) and the pulse output control flag (e.g.
sys_bIsPulseChannel0Active) for the channel used are TRUE. No other
high-speed counter instruction or pulse output instruction can be executed as
long as this flag is TRUE.
 If both the main program and the interrupt program contain code for the same
channel, make sure both are not executed simultaneously.
 To set a PLC output to FALSE that was previously set to TRUE by this instruction,
use an RST or MOVE instruction.
 To cancel execution of an instruction, set bit 3 of the data register storing the
high-speed counter control code (sys_wHscOrPulseControlCode) to TRUE. The
high-speed counter control flag then changes to FALSE. To re-enable execution
of the high-speed counter instruction, reset bit 3 to FALSE.
 The status of the high-speed counter control flag or pulse output control flag may
change while a scan is being carried out. For example, if the flag is used more
than once as an input condition, different statuses may exist within one scan. To
ensure proper execution of the program, the status of the special internal relay
should be copied to a variable at the beginning of the program.
PLC types Availability of F167_HighSpeedCounter_Reset (see page 1322 )