
TECHNICAL OVERVIEW
Issue A May 1998
Synergy Mobile Workshop Manual
Chapter 4 Page 3
Lo
cal
B
us
SRAM
Bu
ff
er
Bu
ff
er
Glo
b
al
Bus
SRAM
Lo
cal
B
us
SRAM
Bu
ff
er
Glo
b
al
Bus
SRAM
Lo
cal
B
us
SRAM
Bu
ff
er
Glo
b
al
Bus
SRAM
Lo
cal
B
us
SRAM
Bu
ff
er
Glo
b
al
Bus
SRAM
Sha
red
Memory
PCI
B
us
Interface
Dev
ice
Arbi
tr
ation
Lo
g
ic
JT
AG
Port
&
C
ontroller
PER
OM
PER
OM
PER
OM
PER
OM
pinst
rip
pinst
rip
pinst
rip
pinst
rip
pinst
rip
pinst
rip
DS
P
1
320
C44
DS
P
2
320
C44
DS
P
3
320
C44
DS
P
4
320
C44
ComPo
rt
Header
DSPL
INK
Header
Cable
Jumper
Lin
e
Re
ce
ivers
Shift
R
egister
&
Latch
Com
P
ort
Cont
rol
Interrupt
Cont
rol
Headbox
L
CA
Pati
ent
Resp
onse
Po
rt
EP
Stim
Con
trol
Po
rt
Tr
ig
g
e
r
In
&
T
rig
ge
r
O
ut
Sti
m
W
a
tchdo
g
DAC
Con
trol
Sti
m
Ti
m
e
rs
Stimulator
LCA
Audio
D
AC
&
A
m
p
lifier
De
code
PA
L
51
2
x
1
8
FIF
O
Qu
a
d
UAR
T
Address
Bus
Data
Bus
Figure 4-2 Overall schematic of the DSP Card and daughter board. (Max of 3 DSP chips fitted.)