AC37 High-Speed Communication Adapter Card
2-1
REGISTER DEFINITION
The CPU accessible registers are addressed as follows:
TRANSMIT BUFFER REGISTER:
OFFSET 0 - WRITE ONLY
Data written to the transmit register is put into a 512 byte deep FIFO ( First In First Out ) memory. The CPU on the
AC37 then reads and transmits the data out the RS-485 port.
RECEIVE BUFFER REGISTER:
OFFSET 0 - READ ONLY
This register is used to read data received on the RS-485 port. Remote Bus data received is buffered in a 512 byte
deep FIFO (First In First Out) memory.
CARD IDENTIFICATION REGISTER:
OFFSET 7 - READ ONLY
This register will always read as 37 Hex, which may be used by software to identify the port as an AC37. Writing to
this address will have no effect.
Offset from
Base Address
DLAB *
State
Register
Function
Type
0
0
Receive Buffer
Read Only
0
0
Transmit Buffer
Write Only
0
1
Baud Rate
Select
Read/Write
1
0
Interrupt Enable
Read/Write
2
X
Interrupt
Identification
Read Only
2
X
Reset Control
Write Only
3
X
Line Control
Read/Write
5
X
Line Status
Read Only
6
X
Modem Status
Read Only
7
X
Card
Identification
Read Only
X = Don’t
Care
* The DLAB (Divisor Latch Access Bit) is bit 7 of the Line
Control Register.
CHAPTER 2
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