Onkyo TX-SR674, Руководство по обслуживанию

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INPUT MU
X
DATA
PREPROCESSOR
DECIM
A
TION
AND
DOWNSAM
PLING
FI
LTE
R
S
STANDARD DEF
INITI
ON PROCESSOR
LUMA FI
LTE
R
OUTPUT FIFO AND FORMATTER
AIN1 TO AIN12
SERIAL INTERFACE
CONTROL AND VBI DATA
SCL
K
SDA
ALSB
SYNC
EXTRACT
16
HS
8 8
P29–P22 P19–P12 P9–P2 PIXEL DATA
VS FIELD/DE LLC1 SFL/ SYNCOUT
CVBS
S-VIDEO
YPr
Pb
SCART
–
(RGB + CVBS)
GRAPPHICS RG
B
12
CHROMA FI
LTE
R
CHROMA DEM
O
D
F
SC
RECOVERY
INT
LUMA
RESAM
PL
E
LUMA
2D COMB (5H M
A
X)
RESAM
PL
E
CONTROL
CHROMA RESAM
PL
E
CHROMA 2D COMB (4H M
A
X)
FAS
T
BLANK OVERL
A
Y
CONTROL
AND
AV CODE INSERT
IO
N
FB
Y
Cb
Cr
VBI DATA RECOVERY
M
A
CROVISION
DETECTION
STANDARD
AUTODETECTIO
N
CVBS/Y
C
Cb
Cr
Cb
Y
COLORSPACE CO
NVERSIO
N
CVBS
Cr
8
CO
M
PONENT
PRO
C
ESSO
R
SCL
K
2
SDA2
SSPD
ST
DI
SYNC PRO
C
ESSING
AND
CLOCK GENERATION
DCLK_IN
DE_IN HS_IN VS_IN
SO
G
SO
Y
DI
GI
TAL I
N
PUT
PO
RT
DVI or HDM
I
XT
AL
XT
AL
1
24
8 8 8
DIGITAL
FI
NE
CLAMP
GAI
N
CONTROL
OFFS
ET
CONTROL
AV CODE INSERT
IO
N
24
10
10 10
10 10 10 10
ACT
IVE PEAK AND AGC
M
A
CROVISION
DETECTION
CGM
S DATA
EXTRACTION
P40–P31 P29–P20 P11
–P10 P1–P0
10
A/D
CLAMP
ANTI ALIAS FILTE
R
10
A/D
CLAMP
ANTI ALIAS FILTE
R
10
A/D
CLAMP
ANTI ALIAS FILTE
R
10
A/D
CLAMP
ANTI ALIAS FILTE
R
MD-2000 TX-SR674/674E/8467
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -41
Q8101: ADV7401 (Multi-Format SDTV/HDTV Video Decoder)
BLOCK DIAGRAM