5
4
3
2
1
6
D
C
A
B
D
C
A
B
5
4
3
2
1
6
TX-RZ820
Schematic Diagram
PART-2 BLOCK DIAGRAM(Video)
8bit_656
VS
HS
DEC_LLC
PROUT1AD
PBOUT1AD
VOUT1AD
RGB565
AM_LCD_PCLK
AM_LCD_VSYNC
AM_LCD_HSYNC
AM_LCD_AC_BIAS_EN
PR1
PR1
PB1
PB1
CY2
CY2
PR2
PR2
PB2
PB2
CV1
CV1
CV2
CV2
CY1
CY1
LCD_VSYNC
U5
LCD_HSYNC
R5
AM_LCD_D[0-15]
-
LCD_PCLK
V5
AIN1
19
LLC
11
PCLKIN
211
AIN2
23
HS
1
LCD_AC_BIAS_EN
R6
AIN3
24
VS
31
P[0-7]
DEIN
61
VSYNCIN
59
HSYNCIN
60
D[3-23]
-
USB 2.0
AM3354
SDIO/UART
EMAC
TX1
TX0
HDMI IN7
MAIN OUT
HDMI IN3
HDMI IN4
HDMI IN6
HDMI IN5
HDMI IN1
HDMI IN2
SUB/Z2 OUT
Except for T5/D2
TMDS
RX3
RX2
RX1
RX0
LINK0
HDMI Tranceiver
RX
MN864787
HDMI Tranceiver
MN864788A
FRONT
Component IN
CVBS IN
Q2002
74VHC4051AFT
+6dB
Q8202
ADV7180
UP Conv.480i
10Bit,
86MHz ADC
Processor
BATRM-2023
Q2003
74VHC4053AFT
13.5MHz LPF
Q2102/2103/2104
2SA1162-GR
8bit ITU-R BT.656 YCrCb4:2:2
Q8300
LINK1
RX
LINK0
RX
LINK1
RX
NET/OSD VIDEO
D[3-7]=B[0-4]=LCD[0-4]
D[10-15]=G[0-5]=LCD[5-10]
D[19-23]=R[0-4]=LCD[11-15]
Q8401
BAPRC-2034
Q3001
Analog Video SW
Except for T5/D2
Conponent IN2
except L3