TX-NR801/E
IC BLOCK DIAGRAMS AND DESCRIPTIONS
CS8900A(Ethernet Controller)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Symbol
AVSS0
ELCS
EECS
EESK
EEDataOut
EEDataiN
CHIPSEL
DVSS1
DVDD1
DVSS1A
DMARQ2
DMACK2
DMARQ1
DMACK1
DMARQ0
DMACK0
CSOUT
SD15
SD14
SD13
SD12
DVDD2
DVSS2
SD11
SD10
SD09
SD08
MEMW
MEMR
INTRQ2
INTRQ1
INTRQ0
IOCS16
MEMCS16
INTRQ3
SBHE
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
REFRESH
SA12
Description
Analog ground pin
External logic chip select pullup pin
EEPROM chip select output pin
EEPROM serial clock pin
EEPROM data output pin
EEPROM data input pin
Chip select pin
Digital ground pin
Digital power source pin
Digital ground pin
DMA(Direct Memory Access) request output pin
DMA acknowledge input pin
DMA request output pin
DMA acknowledge input pin
DMA request output pin
DMA acknowledge input pin
Chip select output pin for external boot EROM
System data bus output pin
System data bus output pin
System data bus output pin
System data bus output pin
Digital power source pin
Digital ground pin
System data bus output pin
System data bus output pin
System data bus output pin
System data bus output pin
Memory write input pin
Memory read input pin
Interrupt request output pin
Interrupt request output pin
Interrupt request output pin
I/O chip select 16-bit output pin
Memory chip select 16-bit output pin
Interrupt request output pin
System bus high enable input pin
System address bus input pin
System address bus input pin
System address bus input pin
System address bus input pin
System address bus input pin
System address bus input pin
System address bus input pin
System address bus input pin
System address bus input pin
System address bus input pin
System address bus input pin
System address bus input pin
Refresh input pin
System address bus input pin
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Symbol
SA13
SA14
SA15
SA16
DVSS3
DVDD3
DVSS3A
SA17
SA18
SA19
IOR
IOW
AEN
IOCHRDY
SD0
SD1
SD2
SD3
DVDD4
DVSS4
SD4
SD5
SD6
SD7
RESET
TEST
SLEEP
BSTATUS or HC1
DI+
DI-
CI+
CI-
DO+
DO-
AVDD2
AVSS2
TXD+
TXD-
AVSS1
AVDD1
RXD+
RXD-
RES
AVSS3
AVDD3
AVSS4
XTAL1
XTAL2
LINKLED or HC0
LANLED
Description
System address bus input pin
System address bus input pin
System address bus input pin
System address bus input pin
Digital ground pin
Digital power source pin
Digital ground pin
System address bus input pin
System address bus input pin
System address bus input pin
I/O read input pin
I/O write input pin
Address enable input pin
I/O channel ready output pin
System data bus output pin
System data bus output pin
System data bus output pin
System data bus output pin
Digital power source pin
Digital ground pin
System data bus output pin
System data bus output pin
System data bus output pin
System data bus output pin
Reset input
Test enable input pin
Hardware sleep input pin
Bus status or host controlled output pin
AUI(Attachment Unit Interface) data differential output pin+
AUI data differential output pin -
AUI data differential input pin+
AUI data differential input pin-
AUI collision differential input pin+
AUI collision differential input pin-
Analog power source pin
Analog ground pin
10BASE-T transmit, differential output pin +
10BASE-T transmit, differential output pin -
Analog ground pin
Analog power source pin
10BASE-T receive, differential input pin +
10BASE-T- receive, differential input pin -
Reference resistor input pin
Analog ground pin
Analog power source pin
Analog ground pin
20MHz crystal input pin
20MHz crystal output pin
Link good LED or host controlled output pin
LAN activity LED output pin
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