SHEET
DATE
DESIGN
DRAWING_No.
TITLE
SPI
SPI0
SPI
RMII
SPI
SPI0
SPI
AUXIN1
AUXIN2
AD.Rch
SPDIFn
SPDIF0
DIR
RECOUT1
RECOUT0
XMCKO
AUXIN0
ADC
ADC clock
HDMI_LRCK
DIR_CS
DIR_INT0
DIR_RST
AD.Lch
DIR_MCK
HDMI_FLR
HDMI_MCK
HDMI_BCK
AddressBus
DataBus
ControlSig.s
Req
DA830_CS
UART1
JTAG
HDMI_FLR (DL0)
HDMI_MCK
HDMI_BCK
HDMI_LRCK (DR0)
HDMI_SLR (DR1)
HDMI_CSW (DL1)
HDMI_SBLR (DR2)
AXR1_5
AXR1_8
DACCS
MDIO
50MHz
Tx+/-
Rx+/-
Tx+/-
Rx+/-
DA83_RST
+3.3V
+1.2V
DA83_RST
USB 2.0
USB 1.1
ACP_RST
I2C0
AXR1_9
AXR1_7
HDMI_SPDIF
ARC
HDMI_SPDIF (DL2)
SDOUTDIR_HDMIFLR
LRCKDIR_HDMI
BCKDIR_HDMI
DIR_MCK
ADSP_MCK
AHCLKX0
ACLKR1
AXR1_4
ADSP_MCK
AHCLKX1
AXR1_1
ADSP1_SD1
AXR1_2
ADSP1_SD2
AXR1_3
ADSP1_SD3
AXR1_11
ADSP1_SD4
ADSP_SD0
AXR1_0
AFSX1
ADSP_LRCK
ADSP1_BCK
ACLKX1
ADSP1_SD0
ADSP1_BCK
ADSP1_LRCK
Lch
Rch
Cch
SWch
SLch
SRch
SBLch
SBRch
BGC_RST
DA83_RST
DIR_RST
DIR_INT0
Z2DACMUT
DACCS
DIR_CS
Req
DA830_CS
AFSR1, AXR1_10
MCK_NET_Z2_256fs
MAIN OUT
MPIO_B
MPIO_C
A
C
D
DIR/ADC
I
D
R
DIVIDE
DIVIDE
122
MCLK
121
WS0
SCK0(DSD CK)
124
126
127
128
SPDIF0_OUT
SDO1
SDO2
SDO3
DAC
130
20
19
18
17
16
15
12.288/11.2896
125
SDO0
133
SD0_IN
7 BCK
132
131
SCK0_IN
WS0_IN
McASP0
NC
VOUT 7/8
VOUT 5/6
VOUT 3/4
VOUT 1/2
HOST uCom
PCM9211
Main Port
SII9573
McASP1 AXR1_0 - 3
McASP1 AXR1_4 -10
BLOCK DIAGRAM (DIGITAL AUDIO)
8
49
SCHEMATIC DIAGRAM (PART-3)
BLOCK DIAGRAM(DIGITAL AUDIO)
T.Tanaka
RC-203001
2013/06/04
Model No. TX-NR535
PCM1690
8 DIN1
9 DIN2
10 DIN3
11 DIN4
6 LRCK
14 SCK
TX-NR535
MPIO_A0
MPIO_A1
MPIO_A2
MPIO_A3
VINL
VINR
RXIN0
RXIN1
RXIN2
RXIN3
RXIN4
RXIN5
RXIN6
RXIN7
MPO0
MPO1
MPIO_B0
MPIO_B1
MPIO_B2
MPIO_B3
MPIO_C0
MPIO_C1
MPIO_C2
MPIO_C3
DOUT
XTI
LRCK
BCK
SCKO
24.576MHz
256Mbit 133MHz x2pcs
SDRAM
24MHz
Serial Console
16Mbit SFI flash
SPI flash
PHY
RJ-45
ResetGen.
Reg1.2V
Apple ACP
11.2896MHz
DA830
WiFi Dongle
TX-NR535
SCHEMATIC DIAGRAMS-03
BLOCK DIAGRAM DIGITAL AUDIO SECTION
TX-NR535
A
1
2
3
4
5
B
C
D
E
F
G
H
6
7
8
I
J
K
