Onkyo PDR-155, Руководство по обслуживанию

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PDR-155
IC BLOCK DIAGRAM / TERMINAL DESCRIPTION
IC801 : M65774BFP
MPEG2 Decoder IC
Block Diagram
Pin Function-1
Descrambler
Bit Streem
Input Interface
Bit Streem
Host CPU
16M DRAM
16M bit SDRAM
Video Output
PCM Audio Output
IEC958 Output
Internal
CPU
Write BUS
H BUS
SDRAM
Controller
ROM RAM
Host
Interface
Video Decoder
Sub-picture
Decoder
Display
Processor
Special Playback
Processor
Video Output
Interface
Audio Output
Interface
. o N e m a N n Pi
Pin Function
I/O o N e m a N n i P O I/ n Function i P
1 D N GI d n u o r G 21 5VDD ly p p u s r e w o p V 5
2 D0 H
O / I d output port n a t u p n i a t a D
2 22 HD15 / I/O rt o p t u p t u o d n a t u p n i a t a D
3 1 D H 23 CS t u p n i l a n g i s t c e l e s p i h C
4 2 D H 24 RE t u p n i l a n g i s e l b a n E d a e R
5 3 D H 25 WE t u p n i l a n g i s e l b a n E e t i r W
6 4 D H 26 HE BI t u p n i l a n g i s e l b a n E h g i H e t y B
7 5VDD y l p p u s r e w o p V 5 27
e h t d e t a c i d n i s i h c i h w l a n g i s e g d e l w o n k c A
t s o h e h t a i v g n i t i r w r o g n i d a e r a t a d f o h s i n i f
s u b
8 D D V I y l p p u s r e w o P 28
e h t o t t s n i a g a l a n g i s t s e u q e r t p u r r e t n I
P F 3 7 7 5 6 M m o r f U P C l a n r e t x e
9 5 D H
O I/ tput u o d n a t u p n i a t a D
9 2 ND GI d n u o r G
0 1 6 D H 30 A0 H
I rt o p t u p n i s s e r d d A
1 1 7 HD 31 A1 H
2 1 8 D H 32 A2 H
3 1 9 D H 33 A3 H
4 1 D N G I d n u o r G 34 A4 H
5 1 0 1 D H
O I/ rt o p t u p t u o d n a t u p n i a t a D
5 3 DD VI y l p p u s r e w o P
6 1 1 1 D H 36 5VDD y l p p u s r e w o p V 5
7 1 2 1 D H 37 A5 H
I t r o p t u p n i s s e r d d A
8 1 3 1 D H 38 A6 H
9 1 4 1 D H 39 A7 H
0 2 D D V I y l p p u s r e w o P 40 A8 H
I
I
I
I
I
RYD O
INTR
O
I
I
I
I
Read BUS
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