PA-MC5500
SCHEMATIC DIAGRAMS-1
BLOCK DIAGRAM
2
1
5
1
2
3
4
6
7
8
9
10
11
12
1
2
3
4
5
6
2
1
2
1
2
1
1
SURR. LEFT
CENTER
FRONT RIGHT
FRONT LEFT
FL
+29dB
+29dB
+29dB
+29dB
+12V
+18V
-18V
+15V
-15V
Fan
+5.0V
Logic
+11V
+11V
SP/PRE
RELAY
1st Relay
2nd 3rd Relay
A GND
Center Trans.
Right Trans.
STBY Trans.
MECH SW
OP amp
PowerAMP
15/-15
CPU/Logic
PART-1
PART-2
PART-3
PART-4
PART-5
PART-6
PART-7
PART-8
PART NO
FUNCTION
SUUR. BACK R
Bi AMP R
SUUR. BACK L
Bi AMP L
SURR. RIGHT
+29dB
+29dB
+29dB
HIGH/WIDE L
+29dB
HIGH/WIDE R
FR
C
SL
SR
SBL
SBR
LH/LW
LH/LW
NEW 9ch Block
MPU
+29dB
Mute protect
Relay
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
PA-MC5500
DTA-70.1
MODEL
PART-9
PART-10
YES
YES
YES
BLOCK DIAGRAM
AMP1 (VoltageAMP) SECTION
AMP2 (Final stage) SECTION
AMP3 (Power supply..etc) SECTION
INPUT TERMINAL SECTION
INPUT TERMINAL BASE SECTION
CPU SECTION
SPWAKER TERMINAL SECTION
FRONT PANEL &DG PS SECTION
PS (Primary PS stage) SECTION
*LAYOUT
Input TRM
AMP Block
Right Trans.
Center Trans.
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
8
10
5
3
12
1
4
9
3
2
1
8
8
10
5
3
12
1
4
9
3
2
1
8
8
10
5
3
12
1
4
9
3
2
1
8
8
10
5
3
12
1
4
9
3
2
1
8
+
+
+
+
+
4
3
1
2
4
3
1
2
2
4
3
1
2
4
3
1
2
4
3
1
1
I
3
O
2
G
3
O
2
G
1
I
+
+
+
+
+
+
4
3
1
2
+
+
3
O
2
G
1
I
3
O
2
G
1
I
3
O
2
G
1
I
4
3
1
2
+
+
AC_CORD
+
8
10
5
3
12
1
4
9
3
2
1
8
8
10
5
3
12
1
4
9
3
2
1
8
8
10
5
3
12
1
4
9
3
2
1
8
8
10
5
3
12
1
4
9
3
2
1
8
8
10
5
3
12
1
4
9
3
2
1
8
LIST OF SCHEMATIC DIAGRAM & BLOCK DIAGRAM