Onkyo A-SV610PRO, Руководство по обслуживанию

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NPN Transistor with Positive supply and +ve bias.
[[Rectangular box shows DVM]]
This typical circuit often seen in amplifier and power supply is a common approach to general application
circuit design. This circuit is a normal configuration often used in amplifiers having an inverted output. The
output of Q1 at its emitter shall have a loss up to 650mv depending on the transistor gain. The circuit shall
have an output proportional of input, less switching loss. The bias voltage is dependant on R3 value, which
also defines Q1 emitter output DC voltage. Other condition may exist depending on the value of R4 and
R5.
Fig2 Fig3
Fig4
Unlike Fig 1, 2, and 3 fig 4 shows non-
inverting output whose collector voltage
can be switching opposite of the vb for Q1.
The higher the vb at Q1 the lower the
collector voltage will be. That is because
more biasing will cause Q1 to conduct
more as the current flow through R4 is
nominal compared the current to be drawn
through R5.