One Stop Systems
OSS-PCIe-HIB25-x8-H/T
Rev. A
Page 11
Notes:
1
Optional signals that are not implemented are to be left as no connects on the board side connector.
2
Reserved signals must be left as no connects on the board side connector.
3
Although support of CWAKE# is optional from the board side connector perspective, an allocated wire is mandated for the cable
assembly.
4
Board side pin-out on both sides of the Link is identical. The cable assembly incorporates a null modem for the PCIe transmit and
receive pairs.
PCI Express x8 Connector Pin Assignment
Row A
Row B
Row A
Row B
Row A
Row B
Pin #
Signal Name
Signal Name
Pin #
Signal Name
Signal Name
Pin #
Signal Name
Signal Name
1
GND
GND
13
GND
GND
24
PETn4
PERp4
2
PETp0
PERp0
14
PWR (3.3V)
25
GND
GND
3
PETn0
PERn0
15
CREFCLK-
PWR (3.3V)
26
PETp5
PERp5
4
GND
GND
16
GND
PWR (3.3V)
27
PETn5
PERn5
5
PETp1
PERp1
17
RSVD
PWR RTN
28
GND
GND
6
PETn1
PERn1
18
RSVD
PWR RTN
29
PETp6
PERp6
7
GND
GND
19
SB_RTN
PWR RTN
30
PETn6
PERn6
8
PETp2
PERp2
20
CPSRNT$#
CWAKE#
31
GND
GND
9
PETn2
PERn2
21
CPWRON
CPERST#
32
PETp7
PERp7
10
GND
GND
22
GND
GND
33
PETn7
PERn7
11
PETp3
PERp3
23
PETp4
PETp4
34
GND
GND
12
PETn3
PERn3
24
PETn4
PERp4
Row A, Pin 1
Row B, Pin 19
PIN- out for the PCIe x8 Cable