EVBUM2511/D
www.onsemi.com
8
Power Supply
The Evaluation and Development Platform can be
powered using the motherboard and daughterboard
connected together, or by using the daughterboard alone.
The main power supply pin for Ezairo 7150 SL is VBAT.
When using the motherboard with the daughterboard, the
Ezairo 7150 SL hybrid can be powered in the following
ways:
•
Via the programming interface, connected by the 6-pin
DIN header which accesses connector J2.
•
Via an external supply connected to the EXT−PSU
header
•
Via a hearing aid battery (size 312, 13 or 675) inserted
into the 16 mm battery holder (J3) located on the
motherboard
The VBAT−I header located on the motherboard is
provided for measuring the current consumption of Ezairo
7150 SL. For normal operation, short the VBAT−I header.
When using an external supply, ensure the Ezairo 7150 SL
recommended voltage level is not exceeded; refer to Table 2
for minimum and maximum voltages.
Table 2. VBAT MINIMUM AND MAXIMUM VOLTAGES
Minimum (V)
Maximum (V)
1.05
2.00
The PSU−SEL switch allows you to select between any of
the powering options noted above by connecting a two-pin
jumper. This is described in more detail in Table 3. Note that
any pins that are not specified as being shorted are intended
to be left open.
Table 3. POWER SUPPLY SELECTION
Power Source
PSU−SEL
Additional Connections
Programmer
Short Pin 5 and 6
Adaptor must be connected
Battery
Short Pin 1 and 2
A battery must be placed in the battery clip J3
External Supply
Short Pin 7 and 8
An external power supply must be connected to EXT−PSU (positive polarity is
marked by the ‘+’ sign)
When using the daughterboard standalone, you must use
external power via the VBAT and GND pins shown in
Figure 3.
Ezairo 7150 SL provides access to 10 digital I/Os that are
mapped into two power domains: VDDO1 and VDDO3.
The headers VDDO2−SEL and VDDO3−SEL (refer to
Table 4) configure the I/O voltages for each of these power
domains to either VBAT, VDBL (a regulated supply from
Ezairo 7100), or an external supply. The VDDO1 I/O
voltage is internally connected within the hybrid to VDBL
and is used to power the EA2M that is inside the hybrid.
The VDDO2 I/O voltage powers the I/O signals connected
between Ezairo 7100 and nRF51822 inside the hybrid. The
VDDO3 I/O voltage is used by Ezairo 7150 SL for its debug
port interface reset pin.
Table 4. I/O VOLTAGE CONFIGURATIONS
Header
VDBL
VBAT
External Supply
VDDO2−SEL
Short Pins 1 to 2
Short Pins 3 to 4
Short Pins 5 to 6
VDDO3−SEL
Short Pins 1 to 2
Short Pins 3 to 4
Short Pins 5 to 6
Digital Input/Output (DIO)
The motherboard provides access to all of the DIOs
exposed on the Ezairo 7150 SL hybrid on the DIO header.
The header also provides two DGND pins for prototyping
purposes, as well as two buttons tied to DIO24 and DIO29.
The logic levels of the digital inputs/outputs are
dependent on the I/O bank that they are on. DIO5 to DIO9
are powered by VDDO1 (connected to VDBL inside the
hybrid); DIO20 to DIO29 are powered by VDDO3 (the
powering of this bank is configurable).
The DIO signal lines from Ezairo 7150 SL provide access
to a wide variety of interfaces, including:
•
GPIO (controlled by the CFX DSP or controlled by the
Arm
®
Cortex
®
−M3 processor)
•
SPI (x2)
•
I
2
C
•
UART
•
LSAD inputs (x6)
•
Output Clocks
•
Other digital inputs and outputs
