ON Semiconductor ECLSOIC8EVB, Руководство пользователя

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ECLSOIC8EVB
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11
J3
J2
R3
50
W
J7
C1
0.01 m F
GND
C4
0.1
m
F
GND
Short
V
CC
V
EE
DUT
Pin 4
Pin 3
Pin 2
Pin 1
Pin 5
Pin 6
Pin 7
Pin 8
Figure 10. Configuration 7 − Translator Schematic
(Unloaded Testing Condition)
R2
50
W
Table 10. Configuration 7
Device
Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8
J1 R1 J2 R2 J3 R3 J4 R4 C2 C3 J6 R6 J7 R7 C1 C4
MC10ELT21D/MC100EL21D
No No Yes Yes Yes Yes No No No No No No Yes No Yes Yes
MC100EPT21D
*See Appendix for loaded testing condition.