Interrupts
Section 4-6
88
Example:
The Counter Unit is assigned Machine Number 2. You want to clear all IOWR/
IORD-instruction errors by issuing the IOWR-instruction with the Error Clear com-
mand.
4-6
Interrupts
The status information of the 32 Outputs is exchanged with the CJ-series CPU
Unit every I/O refresh via the Special I/O Unit Area. The I/O refresh is executed
cyclically at the end of the Ladder Program or can be forced by I/O refresh instruc-
tion. In both cases the CJ-series CPU Unit takes the initiative for a data-exchange.
In order for the Counter Unit to be able to report the status information of the 32
Outputs to the CJ-series CPU Unit, independent from the I/O Refresh, all Outputs
can be configured to generate interrupts. Important events, indicated by a status
change of the Outputs, can thus be reported as quickly as possible to the CJ-
series CPU Unit.
Note
External interrupts are supported only by CJ1-H and CJ1M CPU Units. They are
not supported by CJ1G-CPU44 and -45 (without ‘H’ suffix). If you want the Coun-
ter Unit to generate interrupts to activate external interrupt tasks in a CJ1-H CPU
Unit, the Counter Unit must be in one of the five positions immediately to the right
of the CJ1-H CPU Unit on the CPU Rack. If you want the Counter Unit to generate
interrupts to activate external interrupt tasks in a CJ1M CPU Unit, the Unit must be
in one of the three positions immediately to the right of the CJ1M CPU Unit on the
CPU Rack.
No external interrupt tasks can be activated for CJ1-H or CJ1M CPU Units if the
CJ1W-CTL41-E Counter Unit is in any other position (i.e., 6th Unit position or fur-
ther away from the CJ1-H CPU Unit, or 4th Unit position or further away from the
CJ1M CPU Unit), or if it is on a CJ-series Expansion Rack. All external interrupt
tasks will be disabled in these cases.
4-6-1
Outputs Generating Interrupts
Enabling / Disabling
Interrupts
The 32 Outputs, can all be configured to generate interrupts to the CJ-series CPU
Unit. If an Output is configured to generate interrupts, an interrupt is issued to the
CJ-series CPU Unit at a rising and at a falling edge of the corresponding bit in the
Unit Output Pattern. For this purpose two external interrupt tasks in the CJ-series
CPU Unit are assigned to every Output. In the external interrupt task you should
write an appropriate (ladder) program that takes the required action on the occur-
rence of an interrupt.
You can configure an Output to generate interrupts by setting the corresponding
bit in the Interrupt Enable Data of the Outputs. The Interrupt Enable Data of the
IOWR(223)
#EC00
CC1= EC, CC2= 00
-
S=Not relevant (fill in valid constant, e.g. D0400 containing
#0000)
#00010002
D= #0002 (Machine Number) and D+1= #0001 (# words)
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