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7
3. The input of A
1
is connected to ground. The output of A
1
is
equal to [A
1
Vos].
4. C
C
is connected between the output of A
1
and common. The
voltage charged on C
C
is equal to the output voltage of A
1
or [A
1
Vos].
5. C
A
is connected between the output of the A
2
network and
common. The voltage charged on C
A
is equal to the output
voltage of A
1
attentuated by A
2
or [A
1
A
2
Vos].
4.1.2
Signal Phase
During the signal phase, the FET switching configuration changes so
that the voltages developed during the zero phase are connected to the
A/D converter. The configuration during the signal phase is shown in
Figure 4-2. The following discussion assumes that the circuit has gone
through more than one charge transformation:
1. C
R
is connected across C
E
and after a sufficient number of
zero and signal phases the voltage on C
E
approaches that
stored on C
R
. That voltage is equal to IR
R
.
2. C
Z
is connected between L
2
and the input of A
1
in a way that
opposes the voltage drop across R
T
and L
4
. Since the voltage
charged on C
Z
is I(R
Z
+ L
1
) the voltage at the output of A
1
is
[A
1
(I(R
T
+ L
4
) - I(R
Z
+ L
2
) + Vos]
or
[A
1
(I(R
T
- R
Z
+ L
4
- L
1
) + Vos]
R
Z
is made to equal the value of R
T
at 0°. This action elimi-
nates the offset of R
T
(100Ω at 0°C).
3. C
C
is connected between the output of A
1
and the top of C
D
in
such a way that opposes the output of A
1
. The voltage
charged on C
D
is
A
1
(I(R
T
- R
Z
+ L
4
- L
1
) + Vos) -A
1
Vos
or
A
1
I(R
T
- R
Z
+ L
4
- L
1
)
If L
4
exactly equals L
1
then this reduces to A
1
I(R
T
-R
Z
).
4. C
A
is connected between the output of the A
2
network and the
top of C
B
in such a way that opposes the output of A
2
. The
voltage charged on C
B
is
A
1
A
2
(I(R
T
- R
Z
+ L
4
- L
1
) + Vos) -A
1
A
2
Vos
or
A
1
A
2
I(R
T
- R
Z
+ L
4
- L
1
)
If L
4
exactly equals L
1
then this reduces to A
1
A
2
I(R
T
- R
Z
)
.
Содержание 868F
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