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NXP Semiconductors

UM10301

User Manual for PCF85x3, PCF85x63, PCA8565, PCF2123, and

PCA21125

UM10301

All information provided in this document is subject to legal disclaimers.

© NXP Semiconductors N.V. 2015. All rights reserved.

User manual

Rev. 2.1 — 23 July 2015

8 of 54

4. Power-on reset (POR)

Traditionally a power-on reset circuit is a circuit that generates a reset pulse once the

supply voltage has reached a certain value upon power-up. The purpose is to ensure a

defined behavior at start-up. This type of power-on reset is not present in these RTCs.
The power-on reset circuit (POR) for these RTCs does not look at the supply voltage, but

instead it is based on an internal reset circuit which is active whenever the oscillator is

stopped, refer to Fig 1. When power is applied to the device it will take some time for the

oscillator to start and during this time the circuit will generate a reset. Also when during

operation the OSCI- or OSCO-pin is pulled to ground, causing oscillation to stop, the

POR will generate a reset pulse. In the reset state the serial bus logic is initialized and all

registers are reset according to the register reset values. Not all registers will be reset.

The only registers that are reset are the ones that control a function i.e. decide on clock

mode, enable an alarm etc. Refer to the datasheet of the respective device for details.
The power on reset duration is thus directly related to the crystal oscillator start-up time.

Due to the long start-up times experienced by these types of circuits on-board testing of

the device would take longer too. In order to speed up this, a mechanism has been built

in to disable the POR (not for PCF8583, PCF8593 and PCF2123). This is called Power-

on reset override. Again, refer to the respective datasheet for details. Once the override

mode has been entered, the device stops immediately being reset and set-up operation

e.g. entry into the external clock test mode, may commence via the serial interface.

Fig 1.

Power-on reset

5. Voltage-low detector

PCF8563, PCA8565 and PCF2123 have an on-chip voltage-low detector, see Fig 2 and

Fig 3. When V

DD

drops below a certain limit defined as V

low

, bit VL in the seconds register

of PCF8563 and PCA8565 is set. Generally the VL-bit is intended to indicate that the

time might be wrong, not that it necessarily is wrong. It will be set if one of the following

four conditions occur:

•

The power has just been applied;

•

The power has dipped down and then recovered;

•

The power has gone away and then come back again;

•

When the oscillator stops running.

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Содержание UM10301 PCA8565

Страница 1: ...20 RTC real time clock timekeeping crystal 32 768 kHz backup Abstract This user manual aims to assist a user of above mentioned Real Time Clocks in achieving successful design in and application It contains useful hints with respect to electrical schematic and PCB layout as well as code examples for the well established NXP PCF8563 and related Real Time Clocks Also the more recent Real Time Clocks...

Страница 2: ...ption 2 1 20150723 Fixed readability issue with certain browsers for Fig 9 2 20150717 Second version Updated section 6 2 01 20081223 Initial version This application note user manual is a complete update of a previous publication titled Application note for the Philips Real Time Clocks PCF8563 73 83 93 which did not have an official AN UM number and is superseded by this document The contents were...

Страница 3: ... valid for the PCF2120 as well particularly information with respect to oscillator crystal crystal and capacitor selection and layout guidelines Chapters 2 and 3 describe the features of these RTCs and include a comparison of the various types Starting from chapter 4 more technical details are described that need to be understood in order to achieve successful application of these real time clocks...

Страница 4: ...l types One or two integrated oscillator capacitors connected to the output of amplifier OSCO in case of only one integrated capacitor Internal power on reset Open drain interrupt pin Wide variety of packages available including naked die Addresses and data are transferred serially via an SPI bus with a maximum speed of 7 0 Mbps PCF2123 PCA21125 or via a two line bidirectional I2 C bus that operat...

Страница 5: ...lar device should be consulted As an example the register organization of the PCF8563 is given below Note that this is just one example and that register organization of other types is not necessarily exactly the same Table 1 Register overview PCF8563 Bit positions labelled as x are not implemented When setting a register also a value must be written for the x bit positions When these are read bac...

Страница 6: ...elected by setting the appropriate bits in the control register In this mode the oscillator is disabled and the oscillator input is switched to a high impedance state This mode can be used to count pulses applied to the oscillator input OSCI There is no crystal in the circuit and OSCO is left open circuit The event counter stores up to 6 digits of data Events are stored in BCD format The 6 digits ...

Страница 7: ...git 99 years 100 ms 10 ms time register no no yes yes no no Electronic tuning register no no no no yes no Programmable alarm and timer functions yes yes yes yes yes yes Low voltage detector yes yes no no yes no Event counter mode no no yes yes no no Option to select between two I2 C addresses no no yes no no no Integrated oscillator capacitor 1 at OSCO 1 at OSCO 1 at OSCO 1 at OSCO 2 1 at OSCO Sup...

Страница 8: ...ll be reset The only registers that are reset are the ones that control a function i e decide on clock mode enable an alarm etc Refer to the datasheet of the respective device for details The power on reset duration is thus directly related to the crystal oscillator start up time Due to the long start up times experienced by these types of circuits on board testing of the device would take longer ...

Страница 9: ...ch the limit where the flag is set before power is re asserted then the flag VL or OS will indicate that time may be VL or is OS corrupted VDD dropping below Vlow or Vosc min in itself does not cause any register to be reset Once the oscillator stops some registers will be reset 6 Oscillator A crystal oscillator as used in a real time clock see Fig 4 is built on the principle of Pierce and uses an...

Страница 10: ...4 Pierce Oscillator equivalent diagram The inverting amplifier with feedback resistor and drive resistor which are not included in Fig 4 is incorporated within the integrated circuit device On the other hand the quartz crystal is a discrete device external to the integrated circuit In the PCF85x3 PCA8565 and PCF2123 PCA21125 the output capacitor COUT is integrated on the integrated circuit PCF8563...

Страница 11: ...Fig 5 External capacitors at OSCI and OSCO should be connected to GND except for PCF8573 PCF8583 and PCF8593 For the latter three it is better to connect these external capacitors to VDD instead because these devices are manufactured in a process that has the substrate connected to VDD n substrate In the other RTCs the substrate is at VSS p substrate 1 For PCF8573 PCF8583 and PCF8593 connect CIN a...

Страница 12: ...tion of load capacitance CL Fig 6 depicts the influence of the load capacitance applied to the crystal on the oscillator frequency The lower curve represents a crystal with a specified CL of 7 pF the upper curve represents a crystal with a specified CL of 12 pF From this graph it is obvious that the 7 pF crystal is more sensitive to deviations from the specified CL If the applied CL is 1 pF lower ...

Страница 13: ... OUT IN PAR The motional arm is a series circuit which forms a closed circuit because there is a capacitance CPAR connected in parallel to this series circuit Of course the crystal itself can t oscillate stand alone but the equivalent capacitance C which determines together with L1 the resulting resonance frequency is now given by the series circuit of CPAR and C1 Thus C is given by 0 1 0 1 C C C ...

Страница 14: ...me and more in depth theory about the oscillator and load capacitance are beyond the scope of this user manual but can be found in AN10716 Background information and theory related to Real Time Clocks and crystals The use of AGC s improve start up by high drive initially to get it going and then reduce drive for low power Table 4 Typical values for crystal and surrounding capacitors Parameter Valu...

Страница 15: ...afety margins to allow for production spread of IC and crystal and to deal with the increasing value of R1 under influence of increased temperature 6 2 Using an external oscillator It is possible to supply a clock signal from an external oscillator instead of using the internal oscillator if for some reason it is desired to not use the internal oscillator In this case no crystal will be connected ...

Страница 16: ... some manufacturers use 6 pF should be selected The PCF2123 has been optimized for use with such a crystal The other RTCs include load capacitance optimized for a 12 5 pF crystal Using a 7 pF crystal would require an external capacitor of about 9 7 pF and thus the capacitances at OSCI and OSCO would not be balanced In general this may have a detrimental influence on start up behavior but no proble...

Страница 17: ...not designed for operating with RC or LC networks neither for use with a ceramic resonator Ceramic resonators have a much shorter start up time than crystals about 100 times faster However they have lower frequency accuracy initial tolerance temperature variations drift and since in an RTC accurate timekeeping is the goal ceramic resonators are not a good choice for an RTC Use a crystal 7 2 Effect...

Страница 18: ...s the largest effect on the parabolic nature of the frequency deviation as a function of temperature Variation in the turnover temperature T0 will shift the deviation curve left or right variation in the offset at room temperature will shift it up or down In practice the combination of variation in T0 and offset at room temperature easily results in a lack of accuracy of 30 ppm at room temperature...

Страница 19: ... these intermediate dielectric constant materials Its capacitance variation as a function of temperature is within 15 from 55 C to 125 C This capacitance change is non linear and therefore difficult to express in ppm C since it changes over the temperature range Capacitance for X7R varies under the influence of electrical operating conditions such as voltage and frequency This rules out many appli...

Страница 20: ...ments Its accuracy is extremely high with deviations of only a second per several million years This equates to accuracy in the order of 10 8 ppm or better In dealing with RTCs it is common to express accuracy in ppm parts per million But what does it mean in more human units A clock going too fast 1 s day has an accuracy of 1 number of seconds in a day 1 24 x 3600 11 57 ppm The other way around 2...

Страница 21: ...n correctly Here the pulling range is large enough to compensate for a spread of 175 ppm Typically a variable capacitor has a temperature coefficient of 300 ppm C to 500 ppm C This capacity change has a very small influence on the accuracy of the oscillator and its influence is shown in the third line from the bottom of the graph The solid line shows the impact of CT here C6 if the value is small ...

Страница 22: ...erature variations 10 Oscillator tuning The PCF8563 PCF2123 PCA8565 and PCA21125 all have a CLKOUT pin which is an open drain output It provides the option to output the buffered crystal frequency or a lower frequency derived from the crystal frequency using division by a power of 2 which can be achieved by enabling CLKOUT in the appropriate control register and choosing the desired frequency Refe...

Страница 23: ... temperature of the application The PCF8573 can be tuned by monitoring the 128 Hz signal at the FSET output Tuning the PCF8583 93 is somewhat more difficult since no buffered clock signal is available There are four different options all with their own drawbacks Measure the period of the 1 s output signal countdown timer This however is time consuming Attach the frequency counter probe to the OSCO...

Страница 24: ...ce every two hours in the normal mode or once every hour in the course mode Each LSB will introduce an offset of 2 17 ppm for normal mode and 4 34 ppm for course mode These values are based on a nominal 32 768 kHz clock The offset value is coded in two s complement giving a range of 63 LSB s to 64 LSB s The correction is made by adding or subtracting 64 Hz clock correction pulses thereby changing ...

Страница 25: ... year is almost six hours longer than 365 days However the duration of a solar year is slightly less than 365 25 days and therefore some exceptions to this rule are required Years that are evenly divisible by 100 are not leap years unless they are also evenly divisible by 400 For example 1600 and 2000 were leap years but 2100 2200 and 2300 will not be The PCF8563 PCA8565 PCF2123 and PCA21125 all c...

Страница 26: ...for the PCF8563 and for reference its block diagram is given in Fig 10 which shows the registers and their addresses The procedure for the other RTCs is similar but there are small differences in register structure and therefore the appropriate datasheet should be consulted first Fig 10 Block Diagram PCF8563 Examples for initialisation and setting of time alarm and timer are given below 12 1 Initi...

Страница 27: ...0 0 14 04 set hours to 14 0 0 0 1 0 1 1 0 16 05 set days to 16 0 0 0 0 0 1 0 1 05 06 set weekdays to Friday Monday is day 1 1 0 0 0 0 1 1 1 87 07 set month to 7 and century bit to 1 0 0 0 0 1 0 0 0 08 08 set years to 08 1 0 0 0 0 0 0 0 80 09 disable minute alarm and reset to 00 1 0 0 0 0 0 0 0 80 0A disable hour alarm and reset to 00 1 0 0 0 0 0 0 0 80 0B disable day alarm and reset to 00 1 0 0 0 ...

Страница 28: ...and set to 15 minutes 1 0 0 0 0 0 0 0 80 0A hour alarm is disabled 1 0 0 0 0 0 0 0 80 0B day alarm is disabled 1 0 0 0 0 0 0 0 80 0C weekday alarm is disabled generate I2 C start condition repeated start 1 0 1 0 0 0 1 0 A2 I2 C slave address write 0 0 0 0 0 0 0 1 01 word address 1 next bytes are data 0 0 0 0 0 0 1 0 02 01 Control status 2 clear alarm flag and enable alarm interrupt generate I2 C s...

Страница 29: ...hapter 17 First period inaccuracy when using the timer The interrupt will generate an output pulse after 9 991 ms or if the counter is set to 41 the interrupt will start after 10 236 ms The timer is started by the acknowledge of the start timer instruction Table 7 Setting the timer Sequence of commands data to be sent Binary BCD HEX Register Address Comments generate I2 C start condition 1 0 1 0 0...

Страница 30: ...alize this as is illustrated in some example circuit diagrams If an RTC will be backed up by a battery or capacitor the current demands of the RTC the required lifetime and the energy available in the backup source need to be matched Backup source properties are dependent on the ambient conditions in which the application has to operate or will be stored and therefore it is important to consider t...

Страница 31: ... available that can power an RTC for over 10 years The battery can simply be connected via a diode D2 to VDD of the RTC and ground If for D2 a Schottky diode is chosen voltage drop is limited However since the voltage of a lithium cell remains rather stable over its life time this is usually not necessary Depending on the soldering method used the battery can often only be placed after the board h...

Страница 32: ...elf discharge rate about 20 per month at room temperature than NiCd batteries about 10 per month The timekeeping current draw of an RTC is so low that often depending on the selected battery capacity the self discharge is the determining factor for the available backup time which in that case would make the NiCd more suitable for backup applications The typical operating temperature range during c...

Страница 33: ...Farad and sometimes even more These supercaps do not have a dielectric like ordinary capacitors but use a physical mechanism that generates a double electric field which acts like a dielectric They are also referred to as EDL capacitors Electric Double Layer capacitors Charging discharging occurs in the ion absorption layer which is formed on the surfaces of the positive and negative electrodes Ma...

Страница 34: ... battery It decreases however with increasing temperature humidity applied voltage and current Although a supercap will often be the better choice as backup source compared to rechargeable batteries in terms of available backup time life time and cost both for relatively short backup times for every specific application pros and cons of both must be evaluated 13 3 1 Charging the backup capacitor A...

Страница 35: ...lting in 35 days In this calculation example the leakage currents through diode D1 and through the super cap have been ignored In a similar way the required capacitance value can be calculated if the required backup time is known 13 4 Diode selection In order to optimize possible backup time it is useful to select a low leakage diode for D1 i e a diode with a low reverse current If without further...

Страница 36: ...pins the crystal and the external load capacitors should be as short as possible Place also a 100 nF 470 nF decoupling capacitor close to the RTC with short tracks to VDD and VSS The external load capacitor s layout preferably is symmetrical and both ground connections should be as close as possible In order to avoid direct signal coupling OSCI and OSCO traces should be routed as far away as possi...

Страница 37: ...4 PCB layout proposal for PCF8563 using leaded components Alternatively to the last point listed above and in order to achieve highest noise immunity a guard ring can be placed around the crystal which must be tied to ground to isolate the crystal from unwanted noise pickup It should be tied to VSS of the real time clock at one place only to avoid unforeseen currents running via the guard ring In ...

Страница 38: ...le to partially switch off VDD such that the RTC is powered down or working at a lower supply voltage than the rest of the circuit without the risk that via such upper clamping diodes SDA SCL and INT would be pulled down as well The other way around with only the RTC powered in order to keep time and the rest of the circuit switched off will be a more common situation If during normal operation th...

Страница 39: ...ower power consumption but not all RTCs allow to select a crystal that requires a CL in that range Select a crystal with a low motional resistance The higher the resistance the higher the losses For lowest power consumption aim to find a crystal with R1 40 kΩ The timer source clock frequency influences power consumption which is highest at 4096 Hz The difference in power consumption between the ot...

Страница 40: ...of the SCL and SDA lines Using the I2 C bus data transfers can be made up to 100 kbit s in Standard mode and up to 400 kbit s in Fast mode The corresponding required maximum rise times are 1 μs for Standard mode and 300 ns for Fast mode The rise time is a product of bus capacitance and the value of the pull up resistor The bus capacitance is the total capacitance of wire tracks connections and pin...

Страница 41: ...x is calculated for both Standard mode and Fast mode I2 C bus The result has been rounded down to E6 standard values 400 kHz I2 C bus Ω k C t R b r kHz P 22 10 9 14 8473 0 10 300 8473 0 12 9 400 100 kHz I2 C bus Ω k C t R b r kHz P 68 10 9 14 8473 0 10 1 8473 0 12 6 100 Two examples of an application diagram are shown in Fig 18 and Fig 19 In these examples the INT output is left unused If used a p...

Страница 42: ...and SPI interface The 1 Farad capacitor is used as a standby backup supply With the RTC in its minimum power configuration i e timer off and CLKOUT off the RTC may operate for several months Fig 19 Application diagram 2 SPI interface Remark CLKOUT and INT are open drain outputs If a pull up resistor is used it should not be connected to voltages higher than the maximum operating voltage as specifi...

Страница 43: ...ion except PCF8583 and PCF8593 The 8 bit countdown timer is controlled by the timer control register The timer control register determines one of 4 source clock frequencies for the timer 4096 Hz 64 Hz 1 Hz or 1 60 Hz and enables or disables the timer Table 10 Timer delays Range of possible timer delays dependent on selected source clock frequency and n Timer Source clock frequency 1 delay for n 1 ...

Страница 44: ...inute clock 1 60 Hz this is unlikely to happen especially when the application software waits for the timer to trigger and then straight away sets a new value for n As long as this new value is written within 1 minute here there is no problem The same reasoning is valid for the other timer source clocks but obviously there is much less time to do so If the 1 second clock is selected this would wor...

Страница 45: ...s the operating mode If bit TI_TP is set to 1 the chosen timer mode is pulsed In this mode an interrupt is generated after the timer period elapses This is independent of the timer flag and will thus happen every time the timer period elapses periodically The clearing of the timer flag is only necessary if TI mode is chosen if the consecutive interrupt is to happen In the TI mode the signal remain...

Страница 46: ...dog is used to give an extra pulse to the time counters to make sure that correct time is kept Also the watchdog will be reset The maximum watchdog value is 2 If at the second rising edge of the 1 Hz clock after a read operation was initiated the reading operation has not been completed yet BLOCK will still be high The time counters don t increase and the watchdog counter increases and reaches its...

Страница 47: ...ne second BLOCK is necessary for a write since the registers must not update whilst new data is being written That is impossible anyway since the clock is switched from the 1 Hz clock to the internal I2 C clock Remark The RTCs allow to set the word address in order to address a particular register for example the seconds register If the application software is written such that separate bus access...

Страница 48: ...ayout High ESR and excessive capacitive loads are the major causes of too long start up times or the oscillator not starting at all Oscillator start up depends also on the ambient temperature 19 2 Checking for oscillation In order to check whether the oscillator is running the initial thought may be to connect an oscilloscope to the oscillator out pin in order to observe the waveform When dealing ...

Страница 49: ... 9 clock pulses will clear the I2 C state machine thus causing the device to release the bus This permits the master to send a STOP condition and now the I2 C interface of the slave will have been reset This works for all I2 C compatible devices without exception According to the I2 C specification there exists a so called general call address This is for addressing every device connected to the I...

Страница 50: ... 7 the crystal frequency will reduce if temperature decreases or increases with respect to the turn over temperature Assuming that the load capacitance fits the crystal selected the oscillator will run at 32 768 kHz and can only run slower under influence of temperature Refer to Chapter 14 PCB layout guidelines to avoid the problem of spurious signals coupling into the oscillator If the RTC runs t...

Страница 51: ...ir applications and products using NXP Semiconductors products and NXP Semiconductors accepts no liability for any assistance with applications or customer product design It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned as well as for the planned application and use of customer s third ...

Страница 52: ...on in frequency vs temperature of a typical 32 768 kHz crystal 17 Fig 8 Influences on time accuracy 21 Fig 9 Oscillator tuning 23 Fig 10 Block Diagram PCF8563 26 Fig 11 Alarm function 28 Fig 12 Backup circuit using primary lithium cell 31 Fig 13 Backup circuit using secondary cell NiCd or NiMH 32 Fig 14 PCB layout proposal for PCF8563 using leaded components 37 Fig 15 PCB layout proposal for PCF85...

Страница 53: ...disclaimers NXP Semiconductors N V 2015 All rights reserved User manual Rev 2 1 23 July 2015 53 of 54 23 List of tables Table 4 Typical values for crystal and surrounding capacitors 14 Table 5 Setting the time and date 27 Table 6 Setting the alarm 27 Table 7 Setting the timer 29 Table 10 Timer delays 43 Table 11 First period delay for timer counter value n 44 ...

Страница 54: ...10 1 PCF2123 Offset register 24 11 Century and leap year Daylight Saving Time 25 11 1 Century tracking 25 11 2 Year and leap year tracking 25 11 3 Daylight Saving Time DST 25 12 Initialization and setting of alarm and timer 26 12 1 Initialization of the RTC and setting the time 26 12 2 Alarm 27 12 3 Setting the timer 29 13 Backup power supply 30 13 1 Lithium Primary cells 30 13 2 NiCd and NiMH sec...

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