TFA9812_2
© NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 02 — 22 January 2009
24 of 66
NXP Semiconductors
TFA9812
BTL stereo Class-D audio amplifier with I
2
S input
8.7.1 Thermal foldback
If the junction temperature of the TFA9812 exceeds the programmable Thermal foldback
threshold temperature the gain of the amplifier is decreased gradually to a level where the
combination of dissipation (P) and the thermal resistance from junction to ambient (R
th(j-a)
)
results in a junction temperature around the threshold temperature.
This means that the device will not completely switch off, but remains operational at lower
output power levels. Especially with music output signals this feature enables high peak
output power while still operating without any external heat sink other than the
printed-circuit board area. If the junction temperature still increases due to external
causes, the OTP switches the amplifier to 3-state mode.
Under I
2
C control the Thermal foldback threshold temperature value can be lowered
(see
): In Legacy control mode the default threshold value of 125
°
C is fixed.
8.7.2 Overtemperature protection
This is a ‘hard’ protection to prevent heat damage to the TFA9812. The overtemperature
threshold level is the 160
°
C junction temperature.
When the threshold temperature is exceeded the output stages are set to 3-state mode.
The temperature is then checked at 1
µ
s intervals and the output stages will operate
normally again once the temperature has dropped below the threshold level.
OTP is flagged by a low DIAG pin. The TFA9812 temperature is an I
2
C reading, see
Under normal conditions thermal foldback prevents the overtemperature protection from
being triggered.
8.7.3 Overcurrent protection
The output current of the power amplifiers is current-limited. When an output stage
exceeds a current of 3 A typical, the output stages are set to 3-state mode and after 1
µ
s
the stages will start operating normally again. These interruptions are not audible.
OCP is flagged by a low DIAG pin and by a high DIAG I
2
C status bit, see
I
2
C settings remain valid.
8.7.4 Overvoltage protection
The supply for the power stages (V
DDA
, V
DDP
) is protected against overvoltage. When a
supply voltage exceeds 20 V the device will enter Sleep mode. When the supply voltage
has fallen below 20 V again the power-up sequence is started.
OVP is flagged by a low DIAG pin and by a high DIAG I
2
C status bit, see
.
I
2
C settings remain valid.
8.7.5 Undervoltage protections
The supplies are protected against undervoltage. When this is detected the device will
enter Sleep mode. When the supply voltage has risen to a sufficient level again the
power-up sequence is started.
shows the UVP trigger levels for the V
DDA
and V
DDA(3V3)
supplies:
