Chapter 13 Peripheral Bridge (PBRIDGE)
MPC5602P Microcontroller Reference Manual, Rev. 4
Freescale Semiconductor
273
Chapter 13
Peripheral Bridge (PBRIDGE)
13.1
Introduction
The Peripheral Bridge (PBRIDGE) is the interface between the system bus and on-chip peripherals.
The Peripheral Bridge of MPC5602P is the same as the one of all other PPC55xx and PPC56xx products
except that it cannot be configured by software and that it has a hard-wired configuration.
13.1.1
Block diagram
Figure 13-1. PBRIDGE interface
13.1.2
Overview
The PBRIDGE acts as interface between the system bus and lower bandwidth peripherals. Accesses that
fall within the address space of the PBRIDGE are decoded to provide individual module selects for
peripheral devices on the slave bus interface.
, the asynchronous bridge is a dedicated module that resynchronizes signals
synchronous to the system clock (SYS_CLK) to the ones synchronous to the motor control clock
(MC_PLL_CLK).
The PBRIDGE has the following key features:
•
Supports the slave interface signals. This interface is only meant for slave peripherals.
•
Supports 32-bit slave peripherals (byte, halfword, and word reads and writes are supported to each)
•
Provides configurable per-master access protections
Peripheral
Bridge
System
Bus
System Bus Crossbar Switch (XBAR)
Asynchronous
Bridge
eTimer_0
Other peripherals
FlexPWM
ADC_0
Safety_Port
Содержание SAFE ASSURE Qorivva MPC5601P
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