NXP Semiconductors PCAL6408A-ARD, Руководство пользователя, Страница: 9 / 25

NXP Semiconductors
UM11704
PCAL6416AEV-ARD evaluation board
registers in their default state and force a re-initialization of the I
2
C state machine, in
the same manner as power-on sequence). The RESET pin is controlled by the EVK
motherboard through J3-1 (Arduino port).
The ADDR pin is digital input and represents a programmable hardware address
package which can be asserted low or high, to assign two different slave addresses. The
input is controlled by the EVK through J3-2 (Arduino port).
The INT pin is an open-drain interrupt output, activated when any input state differs from
its corresponding input port register state, indicating to the host system that an input state
has changed. The line is monitored by the EVK through J3-3 Arduino port and locally
by the LED (D3) located on the daughter board. The LED D3 can be deactivated by
removing JP1 jumper. When D3 is inactive (JP1 removed) the open-drain is polarized
through R5. R5 also has the role to compensate the voltage drop of D3 assuring 3.3V
high level in high state of the interrupt line (see SPF-46663.pdf schematic file).
4.8 I/O bus
The port P0 of the DUT is configured as output. The lines drive the on-board LEDs D4
to D11. The P1 port is configured as input. The on-board switches SW1 to SW8 are
connected on the inputs, so that the user can change the logic state from the switches
located on the daughter board. Both ports P0 and P1 are connected to connector J5.
Table 2 shows the configuration of the I/O bus of the PCAL6416AEV-ARD daughter
board.
U2 pin name (number) Wire label On-board LEDs On-board switches I/O ext. conn. (J5)
P0_0 (A1) IO_0 D4 - 3
P0_1 (C3) IO_1 D5 - 4
P0_2 (B1) IO_2 D6 - 5
P0_3 (C1) IO_3 D7 - 6
P0_4 (C2) IO_4 D8 - 7
P0_5 (D1) IO_5 D9 - 8
P0_6 (E1) IO_6 D10 - 9
P0_7 (D2) IO_7 D11 - 10
P1_0 (E3) IO_8 - SW1 11
P1_1 (E4) IO_9 - SW2 12
P1_2 (D3) IO_10 - SW3 13
P1_3 (E5) IO_11 - SW4 14
P1_4 (D4) IO_12 - SW5 15
P1_5 (D5) IO_13 - SW6 16
P1_6 (C5) IO_14 - SW7 17
P1_7 (C4) IO_15 - SW8 18
Table 2. J5 pin chart
The on- board LEDs can be disabled by placing JP2 jumper in 2-3 position (OPTION
1, see SPF-46663.pdf file). This feature is useful when the user uses the board with
external device connected to J5 I/O port. The switches are connected to the bus through
UM11704 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 1.0 — 1 December 2021
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