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2.4 QSPI Flash
A 128 Mbit QSPI Flash is used on the MIMXRT1010 EVK Board. If the developer wants to boot from the QSPI Flash, the boot
device switch(SW8) settings should be: OFF, OFF, ON, OFF, as shown in
.
2.5 USB PHY Connector
The MIMXRT1010 contains a integrated USB 2.0 PHYs capable of connecting to USB host/device systems at the USB low-speed
(LS) rate of 1.5 Mbits/s, full-speed (FS) rate of 12 Mbits/s or at the USB 2.0 high-speed (HS) rate of 480 Mbits/s.
2.6 Audio input / output Connector
The Audio CODEC used on the MIMXRT1010 EVK Board is Wolfson’s Low Power, high quality Stereo Codec, WM8960.The
MIMXRT1010 EVK Board include one headphone interface (J11), one onboard MIC (P1), two speaker interfaces (J12, J13) , and
the SPDIF interface (J52 & J53, DNP). J11 is a 3.5 mm audio stereo headphone jack, which supports jack detect.
2.7 OpenSDA circuit (DAP-Link)
The OpenSDA circuit (CMSIS–DAP) is an open-standard serial and debug adapter. It bridges serial and debug communications
between a USB host and an embedded target processor.
CMSIS-DAP features a mass storage device (MSD) bootloader, which provides a quick and easy mechanism for loading different
CMSIS-DAP Applications such as flash programmers, run-control debug interfaces, serial-to-USB converters, and more. Two or
more CMSIS-DAP applications can run simultaneously. For example, run-control debug application and serial-to-USB converter
runs in parallel to provide a virtual COM communication interface while allowing code debugging via CMSIS-DAP with just single
USB connection.
For the MIMXRT1010 EVK Board, J41 is the connector between the USB host and the target processor. Jumper to serial
downloader mode to use stable DAP-Link debugger function. If developer wants to make OpenSDA going to the bootloader mode,
and press SW9 when power on. Meanwhile, the OpenSDA supports drag/drop feature for U-Disk. First, use the seral downloader
mode and drag/drop the image file to U-Disk. Then select QSPI Flash as boot device and reset the Board, the image will run.
2.8 JTAG Connector
J55 is a standard 10-pin/1.27 mm Box Header Connector for JTAG. The pin definitions are shown in
support SWD by
default.
Figure 5. JTAG pin definitions
Specifications
MIMXRT1010 EVK Board Hardware User’s Guide, Rev. 0, 30/07/2019
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NXP Semiconductors