
UM11029
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
425 of 515
NXP Semiconductors
UM11029
Chapter 23: LPC84x Self-wake-up timer (WKT)
•
A 750 kHz clock derived from the FRO oscillator. This is the default clock,
•
A 10 kHz, low-power clock with a dedicated on-chip oscillator as clock source.
•
An external clock on the WKTCLKIN pin.
The FRO-derived clock is much more accurate than the alternative, low-power clock.
However, the FRO is not available in most low-power modes. This clock must not be
selected when the timer is being used to wake up from a power mode where the FRO is
disabled.
The alternative clock source is a (nominally) 10 kHz, low-power clock, sourced from a
dedicated oscillator. This oscillator resides in the always-on voltage domain, so it can be
programmed to continue operating in Deep power-down mode when power is removed
from the rest of the part. This clock is also be available during other low-power modes
when the FRO clock is shut-down.
The Low-Power oscillator is not accurate (approxi/- 40 % over process and
temperature). The frequency may still drift while counting is in progress due to reduced
chip temperature after a low-power mode is entered.
An external clock on the WKTCLKIN pin can be used to time the self-wake-up timer in all
low power modes, including deep power-down.
23.6 Register description
23.6.1 Control register
The WKT interrupt must be enabled in the NVIC to wake up the part using the
self-wake-up counter.
Table 423. Register overview: WKT (base address 0x4000 8000)
Name
Access
Address
offset
Description
Reset
value
Reference
CTRL
R/W
0x0
Self-wake-up timer control register.
0
COUNT
R/W
0xC
Counter register.
-
Table 424. Control register (CTRL, address 0x4000 8000) bit description
Bit
Symbol
Value
Description
Reset
value
0
CLKSEL
Select the self-wake-up timer clock source.
Remark:
This bit only has an effect if the SEL_EXTCLK bit is not set.
0
0
Divided
FRO
clock. This clock runs at 750 kHz and provides time-out periods of
up to approximately 95 minutes in 1.33
μ
s increments.
Remark:
This clock is not available in not available in Deep-sleep, power-down,
deep power-down modes. Do not select this option if the timer is to be used to
wake up from one of these modes.
1
Low power clock. This is the (nominally) 10 kHz clock and provides time-out
periods of up to approximately 119 hours in 100
μ
s increments. The accuracy of
this clock is limited to +/- 40 % over temperature and processing.
Remark:
This clock is available in all power modes. Prior to use, the low-power
oscillator must be enabled. The oscillator must also be set to remain active in
Deep power-down if needed.