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Initialization and Configuration Mode
KT34FS6407-34FS6408UG User’s Guide Rev. 1.0 8/2015
30 Freescale Semiconductor, Inc.
7 Initialization and Configuration Mode
7.1 INIT Phase
INIT registers are set to their default values after each POR (power-on reset.) This default configuration is compatible with the default EVB
settings except for the INIT FSSM2 register. Bit IO_23_FS in this register is set by default, which means the fail-safe outputs (FCCU_x of
the MPC5643L or similar device) have to be connected to the IO’s 2 and 3 of the MC34FS6407or MC34FS6408. If MPC5643L (or a similar
device) is not used, the bit IO_23_FS has to be cleared during INIT phase (setting shown in
Table 10 ). The INIT phase of the main part
completes with a Write command to the INIT_INT register. This command closes access to the INIT registers and the device goes into
Normal mode. The same sequence (INIT_FSSM2, INIT_INT) must occur in both Debug and Standard mode. The only difference is in the
timeout constraints used for the Standard mode. In the Standard mode, INIT commands have to be sent before the 256 ms timer (starting
from the RST pin release) expires.
7.2 Normal Operation
During normal operation (after INIT phase), both modes (Normal and Debug) allow you to send to send a WD refresh command. In Debug
mode, no action is taken on a bad WD response. In Normal mode, the KITUSBSPIDGLEVMESPI interface dongle cannot guarantee the
WD refresh period (Windows XP and Windows 7 are not real-time operating systems.) Nevertheless, WD refresh works in Standard mode
using a WD window duration of 512 ms (reconfigured in the INIT phase).
7.3 Debug Mode
The KIT34FS6407EVB or KIT34FS6408EVB is mainly intended to be used in Debug mode. In Normal mode you must either use an MCU
that is able to manage the WD or you must disable WD. If WD is enabled, you must send a valid WD response at startup. The response
must occur within the 256 ms windows after reset release. You must then update WD at the right time. With KIT34FS6407EVB or
KIT34FS6408EVB attached to the KITUSBSPIDGLEVME, this must be done manually (which is feasible, depending on the device’s
register configuration.)
Table 10. INIT FSSM2 Setting
bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
MOSI 1 1 0 0 1 0 1 P
RSTB_
err_FS
IO_23_
FS
PS F_FS1
Secure
_3
Secure
_2
Secure
_1
Secure
_0
bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
MOSI
1 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0