NXP Semiconductors KE15Z, Руководство пользователя

Страница: 9 / 23

TSI software configurations
KE15Z Touch Sensing Interface, User's Guide, Rev. 0, 12/2016
NXP Semiconductors 9
Divider setting
Setting: Divider
Register Value Divider
TSI_SSC0.SSC_PRESCALE_NUM[7:0]
0000001 divide 2
0000011 divide 4
… …
11111111 divide 512
There is an example of the basic clock generation, configure the main clock as 16.65MHz, and the
divider as 16, then the result of switching clock is 1.04Mhz.
Example: Basic Clock Generation
Main Clock(MHz) Divider Switching Clock (MHz)
16.65 16 1.04
3.1.1.2. Advanced clock generation, spread spectrum clocking
The spread spectrum clocking (SSC) increases the noise immunity to RF interference and spreads the
emissions. With the SSC enabled (TSI_SSC0[SSC_MODE] = 00/01), the switching clock is generated
by the SSC module, other than the direct divided main clock.
To improve the noise immunity, the Switching Clock can also be generated as a pseudo random clock
using the PRBS (Pseudo-Random Binary Sequence) method by setting TSI_SSC0[SSC_MODE] = 00,
then the SSCHighRandomWidth(t2) is configured as the random width.
Attached below is the formula of the advanced clock generation, with SSC enabled when
TSI_SSC0[SSC_MODE] = 00/01:
SwitchingClock =
𝑀𝑎𝑖𝑛𝐶𝑙𝑜𝑐𝑘
𝑆𝑆𝐶𝐻𝑖𝑔ℎ𝑊𝑖𝑑𝑡ℎ(𝑡1) + 𝑆𝑆𝐶𝐻𝑖𝑔ℎ𝑅𝑎𝑛𝑑𝑜𝑚𝑊𝑖𝑑𝑡ℎ(𝑡2) + 𝑆𝑆𝐶𝐿𝑜𝑤𝑊𝑖𝑑𝑡ℎ(𝑡3)
*When TSI_SSC0[SSC_MODE] = 00, the SSCHighRandomWidth can be random(PRBS).
Figure below shows the timing of the switching clock generation.
Timing of the Advance Clock Generation with SSC enabled