NXP Semiconductors i.MX 8M Nano UltraLite DDR3L, Руководство пользователя по оборудованию, Страница: 7 / 17

2.2 Boot mode and Boot device configurations
The i.MX 8M Nano UL implements a compressed boot mode decode with four BOOT_MODE pins. It can boot from the boot
configuration selected on SW1101 or from the boot configuration stored on the internal eFUSE. In addition, the i.MX 8M Nano
UL can download a program image from a USB connection when configured in serial downloader mode. The method used to
determine where the processor finds its boot information is from four dedicated BOOT MODE pins.
On the i.MX 8M Nano UL DDR3L EVK, the default boot mode is to boot from the eMMC device. There are two additional boot
devices; a QSPI Nor Flash on the CPU board, and a MicroSD connector on the Base Board. If you set the boot device to QSPI
or MicroSD, the board will boot from the device accordingly.
Table 2 describes the values used for boot selection.
Figure 3. Boot selection
Table 2. Boot selection
BOOT_MODE3
(SW1101 pin4)
BOOT_MODE2
(SW1101 pin3)
BOOT_MODE1
(SW1101 pin2)
BOOT_MODE0
(SW1101 pin1)
Boot Device
0 0 0 0 Boot from fuses
0 0 0 1 Serial downloader
0 0 1 0 eMMC/uSDHC3
0 0 1 1 MicroSD/uSDHC2
0 1 0 0 NAND Flash
0 1 1 0 QSPI 3B Read
0 1 1 1 QSPI Hyperflash 3.3 V
1 0 0 0 ecSPI Boot
NXP Semiconductors
Specifications
i.MX 8M Nano UltraLite DDR3L Evaluation Kit Hardware User's Guide, Rev. 0, March 2, 2021
User's Guide 7 / 17