NXP Semiconductors FXTH870 D Series, Руководство пользователя

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FXTH870xD
Sensors
Freescale Semiconductor, Inc.
51
7.5.3 KBI Edge Select Register (KBIES)
KBIES contains the edge select control bits.
7.6 Functional Description
This on-chip peripheral module is called a keyboard interrupt (KBI) module because originally it was designed to simplify the
connection and use of row-column matrices of keyboard switches. However, these inputs are also useful as extra external
interrupt inputs and as an external means of waking the MCU from STOP or WAIT low-power modes.
The KBI module allows up to eight pins to act as additional interrupt sources. Writing to the KBIPE[3:0] bits in the keyboard
interrupt pin enable register (KBIPE) independently enables or disables each KBI pin. Each KBI pin can be configured as edge
sensitive or edge and level sensitive based on the KBMOD bit in the keyboard interrupt status and control register (KBISC). Edge
sensitive can be software programmed to be either falling or rising; the level can be either low or high. The polarity of the edge
or edge and level sensitivity is selected using the KBEDG[3:0] bits in the keyboard interrupt edge select register (KBIES).
Synchronous logic is used to detect edges. Prior to detecting an edge, enabled keyboard inputs must be at the reset logic level.
A falling edge is detected when an enabled keyboard input signal is seen as a logic 1 (the reset level) during one bus cycle and
then a logic 0 (the asserted level) during the next cycle. A rising edge is detected when the input signal is seen as a logic 0 during
one bus cycle and then a logic 1 during the next cycle.
7.6.1 Edge Only Sensitivity
A valid edge on an enabled KBI pin will set KBF in KBISC. If KBIE in KBISC is set, an interrupt request will be presented to the
CPU. Clearing of KBF is accomplished by writing a 1 to KBACK in KBISC.
7.6.2 Edge and Level Sensitivity
A valid edge or level on an enabled KBI pin will set KBF in KBISC. If KBIE in KBISC is set, an interrupt request will be presented
to the CPU. Clearing of KBF is accomplished by writing a 1 to KBACK in KBISC provided all enabled keyboard inputs are at their
reset levels. KBF will remain set if any enabled KBI pin is asserted while attempting to clear by writing a 1 to KBACK.
7.6.3 KBI Pullup/Pulldown Resistors
The KBI pins can be configured to use an internal pullup/pulldown resistor using the associated I/O port pullup enable register.
If an internal resistor is enabled, the KBIES register is used to select whether the resistor is a pullup (KBEDG[3:0] = 1) or a
pulldown (KBEDG[3:0] = 0).
7.6.4 KBI Initialization
When a keyboard interrupt pin is first enabled it is possible to get a false keyboard interrupt flag. To prevent a false interrupt
request during keyboard initialization, the user should do the following:
1. Mask keyboard interrupts by clearing KBIE in KBISC.
2. Enable the KBI polarity by setting the appropriate KBEDGn bits in KBIES.
3. If using internal pullup/pulldown device, configure the associated pullup enable bits in PTAPE[3:0].
4. Enable the KBI pins by setting the appropriate KBIPE[3:0] bits in KBIPE.
5. Write to KBACK in KBISC to clear any false interrupts.
6. Set KBIE in KBISC to enable interrupts.
$000E 7 6 5 4 3 2 1 0
R
KBEDG7 KBEDG6 KBEDG5 KBEDG4 KBEDG3 KBEDG2 KBEDG1 KBEDG0
W
Reset:
0 0 0 0 0 0 0 0
Figure 39. KBI Edge Select Register
Table 42. KBIES Register Field Descriptions
Field Description
7:0
KBEDGn
Keyboard Edge Selects — Each of the KBEDGn bits selects the falling edge/low level or rising edge/high level function of the
corresponding pin).
0
Falling edge/low level.
1 Rising edge/high level.