NXP Semiconductors freescale semiconductor ColdFire MCF51CN128 Series, Справочное руководство

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Rapid GPIO (RGPIO)
10-2 Freescale Semiconductor
MCF51CN128 Reference Manual, Rev. 6
A simplified block diagram of the RGPIO module is shown in Figure 10-1 . The details of the pin muxing
and pad logic are device-specific.
Figure 10-1. RGPIO Block Diagram
10.1.2 Features
The major features of the RGPIO module providing 16 bits of high-speed general-purpose input/output
are:
• Small memory-mapped device connected to the processor’s local bus
— All memory references complete in a single cycle to provide zero wait-state responses
— Located in processor’s high-speed clock domain
• Simple programming model
— Four 16-bit registers, mapped as three program-visible locations
– Register for pin enables
– Register for controlling the pin data direction
– Register for storing output pin data
decode
mux
31
31
0
31 31 15
16
16 0
31
16
15
0
0
rgpio_enable rgpio_direction rgpio_data_out
rgpio_data_in
Control
Pin Pad Logic
RGPIO
module
RGPIO[15:0]
data from module
data to module
address
Local Bus
Direction Pin Enables Write D ata
Read D ata