NXP Semiconductors freescale MC92604, Руководство пользователя

Страница: 37 / 56

Test Setups
MC92604 Dual GEt Design Verification Board User’s Guide, Rev. 1
Freescale Semiconductor 4-7
4.2.4 Data Jitter Tolerance Test
The test setup shown in Figure 4-6 is used to observe the amount of jitter placed on the serial data inputs
that does not produce errors on the serial data outputs. The MC92604 is placed in ten-bit interface mode
(TBIE) and repeater mode (REPE). The serial data stream can be set to either PRBS or user-defined data.
The control bits are set as follows:
• REPE = ‘1’
• TBIE = ‘1’
All other control inputs are set to ‘0.’
Figure 4-6. Data Jitter Tolerance Test Setup
RF Source
70000 Mainframe
with Microwave
Transition Analyzer
Ch1
Ch2
Function
Generator
Mo
du
la
ti
on
Si
g
n
a
l
10
-MHz Ref
e
rence Clo
c
k
HPIB
CK Error Detector D
CK Pattern Generator D
Bit Error Rate Tester
Clean
Clock
1.25 GHz
Bit Error Rate Data Over the HPIB
Power
Splitter
Jittered Clock
1.25 GHz
Prescaler
Divide-by-10
MC92604DVB
Ser
ial Data
Reference
Clock
125 MHz
(Repeater Mode)
Synthesized
Sweeper
(Carrier Frequency)
DC Blocker