NXP Semiconductors EVB912UF32, Руководство пользователя, Страница: 25 / 44

Support Information
ATA Connector
User’s Manual EVB912UF32 Evaluation Board - Rev 1
MOTOROLA Support Information 19
3.3 ATA Connector
Connector J2 is a standard ATA 40-pin header connector. Figure 3-3 gives the
pin assignments and Table 3-2 gives the signal descriptions for this connector.
39 CSEL CABLE SELECT — Input, indicates unit is a Master or Slave only in
TRUE IDE mode. Otherwise this signal is not used.
40,45 NC NO CONNETION
41 RESET RESET— Input, active high except in True IDE mode
42 WAIT WAIT — Active low output, indicates the card wants to delay the current
memory access cycle.
43 INPACK INPUT ACKNOWLEDGE - Active low output
44 REG REGISTER — Active low input, If used indicates a register access to
the card
46 BVD1 I/O — Can be a status change indication or a Diagnostic test is
complete indication.
47 D08 DATA BIT 8 — Bidirectional
48 D09 DATA BIT 09— Bidirectional
49 D10 DATA BIT 10 — Bidirectional
Pin(s)
Function
Description