MC56F8367EVM User Manual, Rev. 2
2-16
Freescale Semiconductor
Preliminary
2.9 Reset
Logic is provided on the 56F8367 to generate an internal power-on reset. Additional reset logic is
provided to support the reset signals from the JTAG connector, the parallel JTAG interface and
the user reset push button, S1; refer to
RESET
PUSHBUTTON
MANUAL RESET
JTAG_TAP_RESET
JTAG_RESET
RESET
TRST
S1
Figure 2-8. Schematic Diagram of the Reset Interface
Содержание 56F8367
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