nvent Schroff 14579-030, Руководство пользователя

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14579-030 (PXIe System)
6 8 Slot PXIe Backplane (23007-508) R1.5, April 2021
3 8 Slot PXIe Backplane (23007-508)
The PXIe backplane provides:
• 1 PXIe system slot
• 7 PXI Express Hybrid slots
- accepting CompactPCI, PXI, CompactPCI Express, and PXIe modules.
• 1 PCIe-to-PCI bridge
- utilizes a single PCI segment for the hybrid slots
- designed to the PCI Express-to-PCI Bridge Specification 1.0 that enables applications to
migrate legacy parallel PCI bus interfaces to the advanced serial PCI Express
- the bridge is equipped with a single lane PCI Express port and a parallel bus segment
supporting the conventional PCI operation for up to eight PCI masters concurrently.
- Primary Bus: x1 PCI Express Base Specification R1.1 compliant
- Secondary Bus: 33 MHz/32 bit PCI Local Bus Specification R3.0 compliant
• All PXIe hybrid slots with 32 bit 33 MHz PCI interface
• 1 PXIe clock module
- generates and controls PXI specific high accuracy clocks and trigger signals.
• One x4 PCIe Link provided by the System controller is connected to an ultra-high perfor-
mance PCIe switch that operates with up to Gen 3 speeds.
• All of the PXIe peripheral slots have a x4 PCIe link providing a maximum data bandwidth
of 4 GB/s each.