![Nuvoton NuMicro NUC029 Series Скачать руководство пользователя страница 116](http://html1.mh-extra.com/html/nuvoton/numicro-nuc029-series/numicro-nuc029-series_technical-reference-manual_1720306116.webp)
NuMicro® NUC029LEE/NUC029SEE
32-bit Arm
®
Cortex
®
-M0 Microcontroller
Aug, 2018
Page
116
of
497
Rev 1.00
N
U
MICRO
®
N
UC02
9L
E
E
/N
UC029
S
E
E
T
E
CHN
ICA
L R
E
F
E
R
E
NC
E
M
A
NU
A
L
6.3.2 System Clock and SysTick Clock
The system clock has 5 clock sources which were generated from clock generator block. The
clock source switch depends on the register HCLK_S (CLKSEL0[2:0]). The block diagram is
shown in Figure 6.3-3.
111
011
010
001
PLLFOUT
32.768 kHz
4~24 MHz
10 kHz
HCLK_S (CLKSEL0[2:0])
22.1184 MHz
000
1/(1)
HCLK_N (CLKDIV[3:0])
CPU in Power Down Mode
CPU
AHB
APB
CPUCLK
HCLK
PCLK
Note:
Before clock switching, both the pre-selected and newly selected clock sources must be turned on and stable.
Figure 6.3-3 System Clock Block Diagram
The clock source of SysTick in Cortex
®
-M0 core can use CPU clock or external clock
(SYST_CSR[2]). If using external clock, the SysTick clock (STCLK) has 5 clock sources. The
clock source switch depends on the setting of the register STCLK_S (CLKSEL0[5:3]). The block
diagram is shown in Figure 6.3-4.
111
011
010
001
4~24 MHz
32.768 kHz
4~24 MHz
HCLK
STCLK_S (CLKSEL0[5:3])
STCLK
22.1184 MHz
000
1/2
1/2
1/2
Note:
Before clock switching, both the pre-selected and newly selected
clock sources must be turned on and stable.
Figure 6.3-4 SysTick Clock Control Block Diagram