NOVA electronics Inc. MCX514 -
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11.3
Interpolation Driving
1st Pulse
2nd Pulse
Final pulse
CLK
WRN
nPP,nPM,
nDRIVE
a
b
c
nDIR
Valid Level
nPLS
undefined
c
c
c
c
c
c
undefined
Valid Level
Valid Level
a.
The first pulses (nPP, nPM and nPLS) during interpolation driving will be output after a maximum of 4 CLK cycles from WRN
↑
when a driving command is written.
b.
nDRIVE will become Hi level after a maximum of 2 CLK cycles from WRN
↑
.
c.
When in 1-pulse 1-direction type, nDIR (direction) signal is on valid level while Hi level pulse is being output and the period of
1CLK cycle before and after the output (when drive pulse is positive logic).
11.4
Start Driving after Hold Command
Start driving after hold command
Drive command
CLK
WRN
nPP,nPM,
nPLS
nDRIVE
1st Pulse
2nd Pulse
a
b
a.
The first pulses (nPP, nPM and nPLS) of each axis will be output after a maximum of 4 CLK cycles from WRN
↑
when a start
driving after hold command is written.
b.
nDRIVE will become Hi level after a maximum of 2 CLK cycles from WRN
↑
when a driving command of each axis is written.
11.5
Instant Stop
The following figure illustrates the timing of instant stop. Instant stop input signals are EMGN, nLMTP/M (When setting the
instant stop mode) and nALARM.
When an instant stop input signal becomes active, or an instant stop command is written, the output of pulses will be stopped
instantly after the output of pulses being outputted.
CLK
Instant stop signal
nPP,nPM
nDRIVE
Active
Instant stop command WRN
An instant stop input signal requires a pulse width of 2 CLK cycles or more even if the input signal filter is disabled.
When the input signal filter is enabled, the input signal will be delayed according to the time constant of the filter.