NEC Renesas mPD720210, Руководство пользователя по оборудованию

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μ
PD720210 6. Functions Description
R19UH0093EJ0200 Rev.2.00 Page 43 of 59
May 26, 2014
6.3 Clock Output Function
μ
PD720210 can provide the 24MHz or 12MHz reference clock and reset signal to a non-removable device.
This section describes the clock output function for the non-removable device connected to the downstream
port1 (Port1) of the
μ
PD720210.
6.3.1 Clock Output Usage
SUSPEND/NRDCLKO pin can output a reference clock for a non-removable device connected to Port 1 by
setting the pin strapping or the External ROM. Refer to section 5.1.4 and section 5.1.7 for the pin strapping
setting and section 6.3.3 for the External ROM settings. Note that when this function is used, this pin needs a
pull-down resistor.
Also PPON1B/NRDRSTB pin can output a reset signal to the non-removable device. Refer to section 5.1.9.
Note that when this function is used, the pin needs a pull-down resistor.
Figure 6-4 shows the cascade connection of
μ
PD720210 on the same board. With this configuration, a crystal
circuit and a reset circuit for Tier2 are removed. The clock output timing of SUSPNED/NRDCLKO and the reset
timing of PPON1B/NRDRSTB are shown in
μ
PD720210 Data Sheet (R19DS0070E).
Note1: When the clock output function is used, SUSPEND/NRDCLKO pin cannot be used for the suspend
signal function.
Note2: The clock output function must not be used for Port2 Non-Removable device.
Figure 6-4. Clock Output Usage (without External ROM)