5 - 16
Hardware Specifications
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Document Revision 4
Electra Elite IPK
8.1.3
Control
This section indicates the speed or capacity.
H
Control: Stored program with distributed processing
H
Central Processor:
32-bit microprocessor
H
Clock:
25 MHz
H
Interface ETU:
8-bit or 16-bit microprocessor
H
Optional ETUs:
16- or 32-bit microprocessor
H
Multiline Terminal (TDM): 8-bit microprocessor
H
Multiline Terminal (IP):
32-bit microprocessor
H
IP Adapter:
32-bit microprocessor
H
Attendant Console:
4-bit microprocessor
H
SLT Adapter:
4-bit microprocessor
8.1.4
Telephone
The voltage, current, ring signal information for the Electra Elite IPK
Multiline Terminals, Single Line Telephone equipment, and AP(A)-R/
AP(R)-R Units are listed below.
H
Multiline Terminal
Voltage:
-11 ~ -26 Vdc
Maximum Current:
250 mA
H
Single Line Telephone
Standard 2500 Set:
500 type network
Nominal Current:
35 mA
Ring Signal:
56 Vac RMS @ 20 Hz
H
SLT(1)-U( ) ADP
Standard 2500 Set:
500 type network
Nominal Current:
30 mA
Ring Signal:
56 Vac RMS @ 20 Hz
Acoustical characteristics meet Electronic Industry
Association (EIA) standard proposal SP-1286 and
standard EIA RS-470.
Содержание ElectraElite IPK
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