Figure 13.
sbRIO-9607 Pedestal Dimensions in mm (in.)
67.88 (2.672)
41.79 (1.645)
46.93 (1.847)
46.10 (1.815)
54.22 (2.135)
58.27 (2.294)
67.40 (2.654)
72.75 (2.864)
81.89 (3.224)
04.10 (0.162)
18.25 (0.718)
28.69 (1.130)
47.76 (1.880)
61.46 (2.420)
68.51 (2.697)
60.83 (2.395)
41.81 (2.646)
46.94 (2.848)
48.30 (2.901)
55.35 (2.179)
57.19 (2.252)
66.85 (2.632)
73.90 (2.909)
76.26 (3.002)
46.51 (1.831) 41.38 (1.629)
34.39 (1.354) 29.25 (1.152)
15.84 (0.624)
14.82 (0.583)
6.69 (0.263)
4.71 (0.185)
0.0 (0.000)
0.0 (0.000)
A
B
C
E
F
G
H
D
The following table provides the pedestal height from board surface for each corresponding
component shown in the previous figure.
Table 1.
Pedestal Height from Board Surface
Designation
Pedestal Corresponding
Component
Pedestal Height from Board Surface
A, B
ENET PHY
2.05 mm (0.081 in.)
C, D
USB PHY
2.00 mm (0.079 in.)
E
CPLD
2.20 mm (0.087 in.)
F
NAND Flash
2.16 mm (0.085 in.)
G
DDR Memory
2.32 mm (0.091 in.)
H
CPU/FPGA
2.51 mm (0.099 in.)
Note
Pedestals of the same dimensions are allowed to violate the primary side
maximum component height keepaway restrictions.
16
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NI sbRIO-9607 User Manual
